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{{intel title|Clarksfield|core}} | {{intel title|Clarksfield|core}} | ||
{{core | {{core | ||
− | |name=Clarksfield | + | | name = Clarksfield |
− | + | | developer = Intel | |
− | |developer=Intel | + | | manufacturer = Intel |
− | |manufacturer=Intel | + | | first announced = June 24, 2009 |
− | |first announced=June 24, 2009 | + | | first launched = September 23, 2009 |
− | |first launched=September 23, 2009 | + | | isa = x86-64 |
− | |isa=x86-64 | + | | microarch = Nehalem |
− | |microarch=Nehalem | + | | word = 64 bit |
− | |word=64 bit | + | | proc = 45 nm |
− | |proc=45 nm | + | | tech = CMOS |
− | |tech=CMOS | + | | clock min = 1.60 GHz |
− | |clock min=1.60 GHz | + | | clock max = 2.13 GHz |
− | |clock max=2.13 GHz | + | | package = rPGA988A |
− | | | + | | socket = Socket G1 |
− | | | + | |
− | | | + | | succession = |
− | | | + | | predecessor = |
+ | | predecessor link = | ||
+ | | successor = | ||
+ | | successor link = | ||
}} | }} | ||
− | '''Clarksfield''' ( | + | '''Clarksfield''' (formally '''Clarksfield QC''') is the core name given by [[Intel]] for their [[quad-core]] using 5 series chipset. These were first generation ({{intel|Nehalem|l=arch}}-based) {{intel|Core i7}} high-performance mobile processors. These chips were manufactured on a [[45 nm process]] and uses {{intel|PM55}} Express [[chipset]]. These MPUs introduce a number of new features. |
== Features == | == Features == | ||
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* 45 W - 55 W TDP | * 45 W - 55 W TDP | ||
* 2.5 GT/s DMI 1.0 | * 2.5 GT/s DMI 1.0 | ||
− | * 8 | + | * 8 GB Maximum Memory (DDR3-1333) |
* Support everything up to SSE4.2 ({{x86|MMX}}, {{x86|SSE}}, {{x86|SSE2}}, {{x86|SSE3}}, {{x86|SSSE3}}, {{x86|SSE4.1}}, {{x86|SSE4.2}}) | * Support everything up to SSE4.2 ({{x86|MMX}}, {{x86|SSE}}, {{x86|SSE2}}, {{x86|SSE3}}, {{x86|SSSE3}}, {{x86|SSE4.1}}, {{x86|SSE4.2}}) | ||
* Supports {{intel|Hyper-Threading}}, {{intel|VT-x}}, {{intel|VT-d}}, {{intel|EPT}}, {{intel|TBT 1.0}}, and {{intel|TXT}} | * Supports {{intel|Hyper-Threading}}, {{intel|VT-x}}, {{intel|VT-d}}, {{intel|EPT}}, {{intel|TBT 1.0}}, and {{intel|TXT}} |
Facts about "Clarksfield - Cores - Intel"
designer | Intel + |
first announced | June 24, 2009 + |
first launched | September 23, 2009 + |
instance of | core + |
isa | x86-64 + |
manufacturer | Intel + |
microarchitecture | Nehalem + |
name | Clarksfield + |
process | 45 nm (0.045 μm, 4.5e-5 mm) + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |