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{{intel title|Core i7-3960X Extreme Edition}} | {{intel title|Core i7-3960X Extreme Edition}} | ||
− | {{ | + | {{mpu |
| name = Core i7-3960X Extreme Edition | | name = Core i7-3960X Extreme Edition | ||
| no image = Yes | | no image = Yes | ||
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| image size = | | image size = | ||
| caption = | | caption = | ||
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| manufacturer = Intel | | manufacturer = Intel | ||
| model number = i7-3960X | | model number = i7-3960X | ||
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| s-spec qs = QBU9 | | s-spec qs = QBU9 | ||
| s-spec qs 2 = QBE7 | | s-spec qs 2 = QBE7 | ||
− | | cpuid = | + | | cpuid = 206D6 |
| microarch = Sandy Bridge | | microarch = Sandy Bridge | ||
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| core stepping 2 = C2 | | core stepping 2 = C2 | ||
| process = 32 nm | | process = 32 nm | ||
− | | transistors = | + | | transistors = |
| technology = CMOS | | technology = CMOS | ||
− | | die | + | | die size = |
− | |||
− | |||
| word size = 64 bit | | word size = 64 bit | ||
| core count = 6 | | core count = 6 | ||
| thread count = 12 | | thread count = 12 | ||
| max cpus = 1 | | max cpus = 1 | ||
− | | max memory = 64 | + | | max memory = 64 GB |
− | |||
+ | | electrical = Yes | ||
| sdp = | | sdp = | ||
| tdp = 130 W | | tdp = 130 W | ||
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| socket type = LGA | | socket type = LGA | ||
}} | }} | ||
− | The '''Core i7-3960X {{intel|Core i7EE|Extreme Edition}}''' was a {{arch|64}} high-end hexa-core [[microprocessor]] introduced by [[Intel]] in late 2011. The i7-3960X operates at 3.3 GHz with turbo mode of up to 3.9 GHz. Fabricated in [[32 nm]] based on the {{intel|Sandy Bridge}} microarchitecture, this chip supports up to 64 | + | The '''Core i7-3960X {{intel|Core i7EE|Extreme Edition}}''' was a {{arch|64}} high-end hexa-core [[microprocessor]] introduced by [[Intel]] in late 2011. The i7-3960X operates at 3.3 GHz with turbo mode of up to 3.9 GHz. Fabricated in [[32 nm]] based on the {{intel|Sandy Bridge}} microarchitecture, this chip supports up to 64 GB (DDR3) of memory and has a Thermal Design Power of 130 W. |
== Cache == | == Cache == | ||
− | {{main|intel/microarchitectures/sandy bridge#Memory_Hierarchy|l1=Sandy Bridge | + | {{main|intel/microarchitectures/sandy bridge#Memory_Hierarchy|l1=Sandy Bridge's Cache}} |
{{cache info | {{cache info | ||
− | |l1i cache=192 | + | |l1i cache=192 KB |
− | |l1i break=6x32 | + | |l1i break=6x32 KB |
|l1i desc=8-way set associative | |l1i desc=8-way set associative | ||
|l1i extra=(per core) | |l1i extra=(per core) | ||
− | |l1d cache=192 | + | |l1d cache=192 KB |
− | |l1d break=6x32 | + | |l1d break=6x32 KB |
|l1d desc=8-way set associative | |l1d desc=8-way set associative | ||
|l1d extra=(per core) | |l1d extra=(per core) | ||
− | |l2 cache=1,536 | + | |l2 cache=1,536 KB |
− | |l2 break=6x256 | + | |l2 break=6x256 KB |
|l2 desc=8-way set associative | |l2 desc=8-way set associative | ||
|l2 extra=(per core) | |l2 extra=(per core) | ||
− | |l3 cache=15 | + | |l3 cache=15 MB |
+ | |l3 break= | ||
|l3 desc=20-way set associative | |l3 desc=20-way set associative | ||
|l3 extra=(shared) | |l3 extra=(shared) | ||
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| bandwidth schan = | | bandwidth schan = | ||
| bandwidth dchan = | | bandwidth dchan = | ||
− | | max memory = 64 | + | | max memory = 64 GB |
}} | }} | ||
== Expansions == | == Expansions == | ||
− | {{expansions | + | {{mpu expansions |
| pcie revision = 2.00 | | pcie revision = 2.00 | ||
| pcie lanes = 40 | | pcie lanes = 40 | ||
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== Features == | == Features == | ||
− | {{ | + | {{mpu features |
| em64t = Yes | | em64t = Yes | ||
| nx = Yes | | nx = Yes | ||
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* '''Note:''' VT-d support is only available on the C2 stepping version. | * '''Note:''' VT-d support is only available on the C2 stepping version. | ||
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== See also == | == See also == | ||
* {{intel|Core i7EE|Core i7 Extreme Edition}} | * {{intel|Core i7EE|Core i7 Extreme Edition}} |
Facts about "Core i7-3960X Extreme Edition - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Core i7-3960X Extreme Edition - Intel#io + |
base frequency | 3,300 MHz (3.3 GHz, 3,300,000 kHz) + |
bus rate | 5,000 MT/s (5 GT/s, 5,000,000 kT/s) + |
bus type | DMI 2.0 + |
clock multiplier | 33 + |
core count | 6 + |
core name | Sandy Bridge E + |
core stepping | C1 + and C2 + |
cpuid | 206D7 + |
designer | Intel + |
die area | 434.72 mm² (0.674 in², 4.347 cm², 434,720,000 µm²) + |
die length | 20.9 mm (2.09 cm, 0.823 in, 20,900 µm) + |
die width | 20.8 mm (2.08 cm, 0.819 in, 20,800 µm) + |
family | Core i7EE + |
first announced | November 14, 2011 + |
first launched | November 14, 2011 + |
full page name | intel/core i7ee/i7-3960x + |
has advanced vector extensions | true + |
has extended page tables support | true + |
has feature | Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Advanced Vector Extensions +, Advanced Encryption Standard Instruction Set Extension +, Enhanced SpeedStep Technology + and Extended Page Tables + |
has intel enhanced speedstep technology | true + |
has intel turbo boost technology 2 0 | true + |
has locked clock multiplier | false + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
l1d$ description | 8-way set associative + |
l1d$ size | 192 KiB (196,608 B, 0.188 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 192 KiB (196,608 B, 0.188 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 1.5 MiB (1,536 KiB, 1,572,864 B, 0.00146 GiB) + |
l3$ description | 20-way set associative + |
l3$ size | 15 MiB (15,360 KiB, 15,728,640 B, 0.0146 GiB) + |
last order | September 26, 2014 + |
last shipment | March 6, 2015 + |
ldate | November 14, 2011 + |
manufacturer | Intel + |
market segment | Desktop + |
max cpu count | 1 + |
max memory | 65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) + |
max operating temperature | 66.8 °C + |
max pcie lanes | 40 + |
microarchitecture | Sandy Bridge + |
min operating temperature | 0 °C + |
model number | i7-3960X + |
name | Core i7-3960X Extreme Edition + |
part number | CM8061907184018 +, CM8061907184017 + and BX80619I73960X + |
platform | 6 Series Chipset + |
process | 32 nm (0.032 μm, 3.2e-5 mm) + |
s-spec | SR0GW + and SR0KF + |
s-spec (qs) | QBU9 + and QBE7 + |
series | Core i7-3900 + |
smp max ways | 1 + |
tdp | 130 W (130,000 mW, 0.174 hp, 0.13 kW) + |
technology | CMOS + |
thread count | 12 + |
transistor count | 2,270,000,000 + |
turbo frequency (1 core) | 3,900 MHz (3.9 GHz, 3,900,000 kHz) + |
turbo frequency (2 cores) | 3,900 MHz (3.9 GHz, 3,900,000 kHz) + |
turbo frequency (3 cores) | 3,800 MHz (3.8 GHz, 3,800,000 kHz) + |
turbo frequency (4 cores) | 3,800 MHz (3.8 GHz, 3,800,000 kHz) + |
turbo frequency (5 cores) | 3,600 MHz (3.6 GHz, 3,600,000 kHz) + |
turbo frequency (6 cores) | 3,600 MHz (3.6 GHz, 3,600,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |