Semiconductor & Computer Engineering
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Editing high-bandwidth memory
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== Motivation == | == Motivation == | ||
{{see also|memory wall}} | {{see also|memory wall}} | ||
| − | The development of HBM rose from the need for considerably higher bandwidth and higher memory density. Drivers for the technology are high-performance applications such as [[graphics processor|high-end graphics]] and networking (e.g., 100G+ [[Ethernet]], TB+ [[silicon photonics]]), and [[high-performance computing]]. Unfortunately | + | The development of HBM rose from the need for considerably higher bandwidth and higher memory density. Drivers for the technology are high-performance applications such as [[graphics processor|high-end graphics]] and networking (e.g., 100G+ [[Ethernet]], TB+ [[silicon photonics]]), and [[high-performance computing]]. Unfortunately over the last few decades, memory bandwidth increased at a much slower rate when compared to computing power, widening a bottleneck gap that was already large. HBM was designed to introduce a [[step function]] improvement in memory bandwidth. |
== Overview == | == Overview == | ||
High-bandwidth memory leverages [[through-silicon vias]] (TSVs) to overcome some of the limitations found in traditional [[memory interfaces]] such as [[DDR3]] and [[DDR4]]. Generally speaking, HBM allows for higher capacity memory by stacking the dies tightly on top of each other thereby also achieving smaller form factors that are not possible using prior solutions such as [[DIMMs]]. The use of TSV also allows for higher power efficiency at the system level. | High-bandwidth memory leverages [[through-silicon vias]] (TSVs) to overcome some of the limitations found in traditional [[memory interfaces]] such as [[DDR3]] and [[DDR4]]. Generally speaking, HBM allows for higher capacity memory by stacking the dies tightly on top of each other thereby also achieving smaller form factors that are not possible using prior solutions such as [[DIMMs]]. The use of TSV also allows for higher power efficiency at the system level. | ||
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[[Category:memory interfaces]] | [[Category:memory interfaces]] | ||