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|designer=DEC | |designer=DEC | ||
|manufacturer=DEC | |manufacturer=DEC | ||
− | |introduction=November 20 | + | |introduction=November 20 1992 |
|process=0.75 µm | |process=0.75 µm | ||
|process 2=0.675 µm | |process 2=0.675 µm | ||
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== Etymology == | == Etymology == | ||
− | The microarchitecture name '''Alpha 21064''' is composed of both the [[ISA]] and the [[microarchitecture|implementation]]. In particular, the "Alpha" refers to [[DEC]]'s [[Alpha AXP]] instruction set architecture while the "21064" refers to a "21st century"-ready {{arch|64}} "generation | + | The microarchitecture name '''Alpha 21064''' is composed of both the [[ISA]] and the [[microarchitecture|implementation]]. In particular, the "Alpha" refers to [[DEC]]'s [[Alpha AXP]] instruction set architecture while the "21064" refers to a "21st century"-ready {{arch|64}} "0th generation" microarchitecture. |
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== Release Dates == | == Release Dates == | ||
− | + | DEC first announced their 21064 architecture in February of [[1992]]. Alpha 21064-based chips were first introduced during [[COMDEX]] on November 20, 1992. | |
== Process Technology == | == Process Technology == | ||
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== Architecture == | == Architecture == | ||
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== Die == | == Die == | ||
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* [[0.75 µm process]] | * [[0.75 µm process]] | ||
* 3 metal layers | * 3 metal layers | ||
− | * 1, | + | * 1,680,000 transistors |
− | * | + | * 14 mm x 17 mm |
− | * | + | * 238 mm² die size |
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== References == | == References == | ||
* McLellan, Edward. "The Alpha AXP architecture and 21064 processor." IEEE Micro 13.3 (1993): 36-47. | * McLellan, Edward. "The Alpha AXP architecture and 21064 processor." IEEE Micro 13.3 (1993): 36-47. |
Facts about "Alpha 21064 - Microarchitectures - DEC"
codename | Alpha 21064 + |
core count | 1 + |
designer | DEC + |
first launched | November 20, 1992 + |
full page name | dec/microarchitectures/alpha 21064 + |
instance of | microarchitecture + |
instruction set architecture | Alpha + |
manufacturer | DEC + |
microarchitecture type | CPU + |
name | Alpha 21064 + |
pipeline stages (max) | 12 + |
pipeline stages (min) | 7 + |
process | 750 nm (0.75 μm, 7.5e-4 mm) + and 675 nm (0.675 μm, 6.75e-4 mm) + |