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| | succession = Yes | | | succession = Yes |
− | | predecessor = PACKETPro | + | | predecessor = |
− | | predecessor link = apm/packetpro | + | | predecessor link = |
| | successor = eMAG | | | successor = eMAG |
| | successor link = ampere computing/emag | | | successor link = ampere computing/emag |
| }} | | }} |
− | '''X-Gene''' was a family of {{arch|64}} [[ARM]] server microprocessors designed and introduced by [[AppliedMicro]]. | + | '''X-Gene''' is a family of {{arch|64}} [[ARM]] server microprocessors designed and introduced by [[AppliedMicro]]. |
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− | == Overview ==
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− | X-Gene was a family of high-performance multi-core ARM microprocessors first announced by [[AppliedMicro]] in 2011. Unlike their traditional product offering, X-Gene directly targeted high-performance data center servers, a market predominantly dominated by [[Intel]] {{intel|Xeon}} processors. AppliedMicro introduced two generations of server processors based on their own custom [[ARM]] microarchitectures - {{apm|Storm|l=arch}} and {{apm|Shadowcat|l=arch}}. Those two generations shipped a total of 25,000 units. In late [[2016]], [[MACOM]] acquired AppliedMicro resulting in the shelving of third-generation X-Gene based on the {{apm|Skylark|l=arch}} microarchitecture. The X-Gene [[intellectual property]] including most of the design team was eventually sold to [[Ampere Computing]] has rebranded the design and improved on it under the {{ampere|eMAG}} brand.
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− | === Naming Scheme ===
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− | :[[File:appliedmicro x-gene naming.svg|550px]]
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− | == Members ==
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− | === X-Gene 1 ===
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− | {{see also|apm/microarchitectures/storm|l1=Storm microarchitecture}}
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− | First-generation of X-Gene processors were announced in October 2011 and later launched in late 2012. X-Gene 1 processors are based on the {{apm|Storm|l=arch}} microarchitecture and were fabricated on [[TSMC]]'s [[40 nm process]]. Those processors had up to four memory channels and up to [[eight cores]] operating at up to 2.4 GHz.
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− | * '''Mem:''' up to 4 memory channels, DDR3 @ up to 1866 MT/s
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− | * '''Tech:''' [[ARMv8]] (ARMv8.0-A)
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− | * '''I/O:''' 17 PCIe, SATA/SGMII, 2x SGMII/XFI, 1x RGMII
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− | | |
− | <!-- NOTE:
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− | This table is generated automatically from the data in the actual articles.
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− | If a microprocessor is missing from the list, an appropriate article for it needs to be
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− | created and tagged accordingly.
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− | | |
− | Missing a chip? please dump its name here: https://en.wikichip.org/wiki/WikiChip:wanted_chips
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− | -->
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− | {{comp table start}}
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− | <table class="comptable sortable tc2 tc3 tc3 tc7">
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− | {{comp table header|main|7:List of Storm-based Processors}}
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− | {{comp table header|main|5:Processor|2:Memory}}
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− | {{comp table header|cols|Launched|TDP|Cores|%Turbo|L3$|Type|Chans}}
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− | {{#ask: [[Category:microprocessor models by appliedmicro]] [[microarchitecture::Storm]]
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− | |?full page name
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− | |?model number
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− | |?first launched
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− | |?tdp
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− | |?core count
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− | |?turbo frequency#GHz
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− | |?l3$ size
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− | |?supported memory type
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− | |?max memory channels
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− | |format=template
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− | |template=proc table 3
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− | |userparam=9
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− | |mainlabel=-
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− | }}
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− | {{comp table count|ask=[[Category:microprocessor models by appliedmicro]] [[microarchitecture::Storm]]}}
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− | </table>
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− | {{comp table end}}
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− | | |
− | === X-Gene 2 ===
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− | {{see also|apm/microarchitectures/shadowcat|l1=Shadowcat microarchitecture}}
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− | Second-generation of X-Gene processors were announced in September 2014 and later launched in early 2015. X-Gene 2 processors are based on the {{apm|Shadowcat|l=arch}} microarchitecture and were fabricated on [[TSMC]]'s [[28 nm process]]. Though those processors were more of a refresh over their predecessor, the new [[process technology]] produced lower-power chips at similar performance. Those processors had up to four memory channels and up to [[eight cores]] operating at up to 2.4 GHz.
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− | * '''Mem:''' up to 4 memory channels, DDR3 @ up to 1866 MT/s
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− | * '''Tech:''' [[ARMv8]] (ARMv8.0-A)
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− | * '''I/O:''' 17 PCIe, SATA/SGMII, 2x SGMII/XFI, 1x RGMII
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− | | |
− | <!-- NOTE:
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− | This table is generated automatically from the data in the actual articles.
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− | If a microprocessor is missing from the list, an appropriate article for it needs to be
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− | created and tagged accordingly.
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− | | |
− | Missing a chip? please dump its name here: https://en.wikichip.org/wiki/WikiChip:wanted_chips
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− | -->
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− | {{comp table start}}
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− | <table class="comptable sortable tc2 tc3 tc4 tc8">
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− | {{comp table header|main|7:List of Shadowcat-based Processors}}
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− | {{comp table header|main|5:Processor|2:Memory}}
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− | {{comp table header|cols|Launched|TDP|Cores|%Turbo|L3$|Type|Chans}}
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− | {{#ask: [[Category:microprocessor models by appliedmicro]] [[microarchitecture::Shadowcat]]
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− | |?full page name
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− | |?model number
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− | |?first launched
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− | |?tdp
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− | |?core count
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− | |?turbo frequency#GHz
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− | |?l3$ size
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− | |?supported memory type
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− | |?max memory channels
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− | |format=template
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− | |template=proc table 3
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− | |userparam=9
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− | |mainlabel=-
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− | }}
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− | {{comp table count|ask=[[Category:microprocessor models by appliedmicro]] [[microarchitecture::Shadowcat]]}}
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− | </table>
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− | {{comp table end}}
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− | | |
− | === X-Gene 3 ===
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− | {{see also|apm/microarchitectures/skylark|l1=Skylark microarchitecture}}
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− | Third-generation of X-Gene processors were announced in 2016 and started sampling in 2017. X-Gene 3 processors are based on the {{apm|Skylark|l=arch}} microarchitecture and were fabricated on [[TSMC]]'s [[16 nm process]]. AppliedMicro made large changed to the system architecture of the chip and some minor changes to the core. The chip design shifted from incorporating an array of accelerators on-die to offering a large set of I/O (mostly PCIe lanes) so that high-performance [[PCIe]]-based [[accelerators]] could be attached instead. In 2017 AppliedMicro sold the X-Gene assets to [[Ampere Computing]] and consequently discontinued the X-Gene line. X-Gene 3 has re-launched by Ampere under the {{ampere|eMAG}} family.
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− | * '''Mem:''' 8x DDR4 channels, up to 2666 MT/s with ECC; 1 TiB/socket
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− | * '''I/O:''' 42 PCIe Gen 3 lanes
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− | * '''TDP:''' Up to 125 W
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− | | |
− | <!-- NOTE:
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− | This table is generated automatically from the data in the actual articles.
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− | If a microprocessor is missing from the list, an appropriate article for it needs to be
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− | created and tagged accordingly.
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− | | |
− | Missing a chip? please dump its name here: https://en.wikichip.org/wiki/WikiChip:wanted_chips
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− | -->
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− | {{comp table start}}
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− | <table class="comptable sortable tc2 tc3 tc4 tc8">
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− | {{comp table header|main|7:List of Skylark-based Processors}}
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− | {{comp table header|main|5:Processor|2:Memory}}
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− | {{comp table header|cols|Launched|TDP|Cores|%Turbo|L3$|Type|Chans}}
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− | {{#ask: [[Category:microprocessor models by appliedmicro]] [[microarchitecture::Skylark]]
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− | |?full page name
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− | |?model number
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− | |?first launched
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− | |?tdp
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− | |?core count
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− | |?turbo frequency#GHz
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− | |?l3$ size
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− | |?supported memory type
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− | |?max memory channels
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− | |format=template
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− | |template=proc table 3
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− | |userparam=9
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− | |mainlabel=-
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− | }}
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− | {{comp table count|ask=[[Category:microprocessor models by appliedmicro]] [[microarchitecture::Skylark]]}}
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− | </table>
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− | {{comp table end}}
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− | | |
− | == See also ==
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− | * Cavium {{cavium|ThunderX2}}
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− | * Qualcomm {{qualcomm|Centriq}}
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− | | |
− | == Bibliography ==
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− | * AppliedMicro. (October 30, 2013). ''"[https://www.apm.com/news/appliedmicro-announces-general-availability-of-x-gene-system-development-ki/ AppliedMicro Announces General Availability of X-Gene System Development Kit for ARM 64-Bit Platform]"''.
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− | * AppliedMicro. (March 08, 2017). ''"[https://www.apm.com/news/macom-announces-sampling-of-x-gene-3-server-on-a-chip-solution/ MACOM Announces Sampling of X-Gene® 3 Server-on-a-Chip® Solution]"''.
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− | * David Schor. (February 5, 2018). "''[https://fuse.wikichip.org/news/776/x-gene-3-gets-a-second-chance-at-ampere-with-a-new-32-core-16nm-arm-processor/ X-Gene 3 gets a second chance at Ampere with a new 32-core 16nm ARM processor]''".
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