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Latest revision | Your text | ||
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|developer=AMD | |developer=AMD | ||
|manufacturer=GlobalFoundries | |manufacturer=GlobalFoundries | ||
− | |first announced=March, 2018 | + | |first announced=March 15, 2018 |
|first launched=April 19, 2018 | |first launched=April 19, 2018 | ||
|isa=x86-64 | |isa=x86-64 | ||
− | |||
|microarch=Zen+ | |microarch=Zen+ | ||
|word=64 bit | |word=64 bit | ||
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|clock min=3,200 MHz | |clock min=3,200 MHz | ||
|clock max=3,700 MHz | |clock max=3,700 MHz | ||
− | |package | + | |package module 1={{packages/amd/socket am4}} |
|predecessor=Summit Ridge | |predecessor=Summit Ridge | ||
|predecessor link=amd/cores/summit ridge | |predecessor link=amd/cores/summit ridge | ||
|successor=Matisse | |successor=Matisse | ||
|successor link=amd/cores/matisse | |successor link=amd/cores/matisse | ||
+ | |package=µOPGA-1331 | ||
+ | |socket=Socket AM4 | ||
+ | |succession=Yes | ||
}} | }} | ||
− | '''Pinnacle Ridge''' is | + | '''Pinnacle Ridge''' is the name of the core for [[AMD]]'s high-end desktop (HEDT) microprocessor line based on the {{amd|Zen+|l=arch}} microarchitecture serving as a successor to the {{amd|Summit Ridge|l=core}} core. Pinnacle Ridge processors are fabricated on GlobalFoundries [[12 nm process]] and introduces a number of enhancements over its predecessor. |
== Overview == | == Overview == | ||
− | Pinnacle Ridge | + | Pinnacle Ridge are actually a complete [[system on a chip]] with both the [[northbridge]] and [[southbridge]] on-die. Summit Ridge chips offer 16 PCIe lanes (generally for the GPU) along with an [[NVMe]] controller and an additional 4 [[PCIe]] lanes for I/O along with [[SATA]] and [[USB 3.0]] links. However, AMD sells those chips along with the {{amd|Socket AM4|Socket AM4 chipset}} which provides support for additional resources (i.e., more PCIe lanes and USB ports). |
=== Common Features === | === Common Features === | ||
− | All | + | All Summit Ridge processors have the following: |
* Dual-channel Memory | * Dual-channel Memory | ||
** Up to DDR4-2933 | ** Up to DDR4-2933 | ||
** Up to 64 [[GiB]] | ** Up to 64 [[GiB]] | ||
− | * | + | * [[8 cores]] / 16 threads |
− | * 65 W / 95 / 105 W | + | * 65 W / 95 / 105 W (full XFR-enabled) |
* Everything up to {{x86||AVX2}} (i.e., {{x86|SMM}}, {{x86|FPU}}, {{x86|NX}}, {{x86|MMX}}, {{x86|SSE}}, {{x86|SSE2}}, {{x86|SSE3}}, {{x86|SSSE3}}, {{x86|SSE4.1}}, {{x86|SSE4.2}}, {{x86|AES}}, {{x86|AVX}}, {{x86|FMA3}}, and {{x86|AVX2}}), and {{x86|SHA}} | * Everything up to {{x86||AVX2}} (i.e., {{x86|SMM}}, {{x86|FPU}}, {{x86|NX}}, {{x86|MMX}}, {{x86|SSE}}, {{x86|SSE2}}, {{x86|SSE3}}, {{x86|SSSE3}}, {{x86|SSE4.1}}, {{x86|SSE4.2}}, {{x86|AES}}, {{x86|AVX}}, {{x86|FMA3}}, and {{x86|AVX2}}), and {{x86|SHA}} | ||
− | * {{amd|Precision Boost | + | * {{amd|Precision Boost}}, {{amd|SMEP}}, 2-way [[SMT]], {{amd|AMD-Vi}}, {{amd|XFR}} (only fully enabled on X models for +100 MHz, otherwise +50 MHz) |
− | == | + | == Summit Ridge Processors == |
<!-- NOTE: | <!-- NOTE: | ||
This table is generated automatically from the data in the actual articles. | This table is generated automatically from the data in the actual articles. | ||
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{{comp table start}} | {{comp table start}} | ||
− | <table class="comptable sortable tc5 tc6 | + | <table class="comptable sortable tc5 tc6 tc11"> |
{{comp table header|main|10:List of Pinnacle Ridge Processors}} | {{comp table header|main|10:List of Pinnacle Ridge Processors}} | ||
− | {{comp table header|main|9: | + | {{comp table header|main|9:Processor|1:Features}} |
− | {{comp table header|cols|Family|Price|Launched|Cores|Threads | + | {{comp table header|cols|Family|Price|Launched|Cores|Threads|Frequency|Turbo|TDP|Max Memory|XFR}} |
{{#ask: [[Category:microprocessor models by amd]] [[instance of::microprocessor]] [[core name::Pinnacle Ridge]] | {{#ask: [[Category:microprocessor models by amd]] [[instance of::microprocessor]] [[core name::Pinnacle Ridge]] | ||
|?full page name | |?full page name | ||
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|?core count | |?core count | ||
|?thread count | |?thread count | ||
− | |||
|?base frequency#GHz | |?base frequency#GHz | ||
− | |?turbo frequency#GHz | + | |?turbo frequency (1 core)#GHz |
|?tdp | |?tdp | ||
− | |?has amd | + | |?max memory#GiB |
+ | |?has amd extended frequency range | ||
|format=template | |format=template | ||
|template=proc table 3 | |template=proc table 3 | ||
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== See also == | == See also == | ||
− | {{amd | + | * {{amd|Zen|l=arch}} |
+ | ** {{amd|Picasso|l=core}} |
Facts about "Pinnacle Ridge - Cores - AMD"
designer | AMD + |
first announced | March 2018 + |
first launched | April 19, 2018 + |
instance of | core + |
isa | x86-64 + |
isa family | x86 + |
manufacturer | GlobalFoundries + |
microarchitecture | Zen+ + |
name | Pinnacle Ridge + |
package | OPGA-1331 + |
process | 12 nm (0.012 μm, 1.2e-5 mm) + |
socket | Socket AM4 + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |