https://en.wikichip.org/w/api.php?action=feedcontributions&user=Jon&feedformat=atomWikiChip - User contributions [en]2024-03-29T09:02:14ZUser contributionsMediaWiki 1.28.1https://en.wikichip.org/w/index.php?title=program&diff=22174program2016-06-18T19:24:30Z<p>Jon: /* Overview */</p>
<hr />
<div>{{cmpen title|Program}}<br />
A '''program''' is an ordered set of operations that are processed by a processing unit (e.g. [[CPU]], [[GPU]], and [[calculator chip]]s) or a processing program (e.g. an [[interpreter]] and [[virtual machine]]). <br />
<br />
A program is usually bundled along with [[documentation]] and any [[dependency|dependent]] [[data]] and [[libraries]]. This bundle is collectively referred to as [[software]]. Such software is further classified into [[system software]] and [[application software]].<br />
<br />
== Overview ==<br />
A program is an ordered set of operations that implements one or more [[algorithm]] in order to solve some problem or complete a task. Programs are usually written by a programmer using a [[programming language]], however they may also be created automatically using specialized code generators. [[Programming]] involves the writing of [[source code]], testing, and modifying the code appropriately. [[Software engineering]] is the discipline under which program development is done which involves the [[software design|design]], [[software construction|construction]], [[software testing|testing]], and [[software maintenance|maintenance]]. <br />
<br />
=== Types of programs ===<br />
[[File:Basic stamp 2p24.jpg|thumb|right|200px|[[Parallax]]'s Basic Stamp 2 board ({{parallax|BS2P24}}). This board has a [[CPU]] and a [[BASIC]] [[interpreter]] on-board.]]<br />
Traditionally, programs in human-readable form ([[source code]]) were converted into an [[executable]] file which could be executed directly by the underlying hardware. Over time a number of other alternatives were developed:<br />
<br />
:'''Compiled Program''' is a [[machine code]] version of the of the original program that was in [[source code]] form. The machine code was generated by a [[compiler]] which performed the [[compilation|conversion]]. [[Machine code]] can be executed directly by the underlying hardware. This is the kind of process that goes along with languages such as [[C]], [[C++]], [[Fortran]], and [[Lisp]] (see [[compiled language]]). Compiled programs can take advantage of the raw performance capabilities of the <br />
<br />
:'''Emulated Program''' is a [[p-code]] (or bytecode) version of the original program that was in [[source code]] form. The portable code was generated by a [[compiler]], however, unlike machine code, p-code cannot typically be executed directly by the hardware and instead needs the assistance of a [[virtual machine]] in order to process such code. This is the idea behind languages such as [[Java]] and [[MATLAB]].<br />
<br />
:'''Interpreted Program''' is a program that is identical to the original [[source code]]. In this kind of methodology, the code is interpreted and executed on the fly. This is the idea behind languages such as , [[Python]], and [[PHP]] (see [[interpreted language]]).<br />
<br />
=== Compilation & Translation ===<br />
{{empty section}}<br />
<br />
=== Execution & Interpretation ===<br />
{{empty section}}<br />
<br />
== Classification ==<br />
{{empty section}}</div>Jonhttps://en.wikichip.org/w/index.php?title=program&diff=22173program2016-06-18T18:49:04Z<p>Jon: /* Overview */</p>
<hr />
<div>{{cmpen title|Program}}<br />
A '''program''' is an ordered set of operations that are processed by a processing unit (e.g. [[CPU]], [[GPU]], and [[calculator chip]]s) or a processing program (e.g. an [[interpreter]] and [[virtual machine]]). <br />
<br />
A program is usually bundled along with [[documentation]] and any [[dependency|dependent]] [[data]] and [[libraries]]. This bundle is collectively referred to as [[software]]. Such software is further classified into [[system software]] and [[application software]].<br />
<br />
== Overview ==<br />
A program is an ordered set of operations that implements one or more [[algorithm]] in order to solve some problem or complete a task. Programs are usually written by a programmer using a [[programming language]], however they may also be created automatically using specialized code generators. [[Programming]] involves the writing of [[source code]], testing, and modifying the code appropriately. [[Software engineering]] is the discipline under which program development is done which involves the [[software design|design]], [[software construction|construction]], [[software testing|testing]], and [[software maintenance|maintenance]]. <br />
<br />
=== Compilation & Translation ===<br />
[[File:Basic stamp 2p24.jpg|thumb|right|200px|[[Parallax]]'s Basic Stamp 2 board ({{parallax|BS2P24}}). This board has a [[CPU]] and a [[BASIC]] [[interpreter]] on-board.]]<br />
Traditionally, programs in human-readable form ([[source code]]) were converted into an [[executable]] file which could be executed directly by the underlying hardware. Over time a number of other alternatives were developed:<br />
<br />
:'''Compiled Program''' is a [[machine code]] version of the of the original program that was in [[source code]] form. The machine code was generated by a [[compiler]] which performed the [[compilation|conversion]]. [[Machine code]] can be executed directly by the underlying hardware. This is the kind of process that goes along with languages such as [[C]], [[C++]], [[Fortran]], and [[Lisp]] (see [[compiled language]]). Compiled programs can take advantage of the raw performance capabilities of the <br />
<br />
:'''Emulated Program''' is a [[p-code]] (or bytecode) version of the original program that was in [[source code]] form. The portable code was generated by a [[compiler]], however, unlike machine code, p-code cannot typically be executed directly by the hardware and instead needs the assistance of a [[virtual machine]] in order to process such code. This is the idea behind languages such as [[Java]] and [[MATLAB]].<br />
<br />
:'''Interpreted Program''' is a program that is identical to the original [[source code]]. In this kind of methodology, the code is interpreted and executed on the fly. This is the idea behind languages such as , [[Python]], and [[PHP]] (see [[interpreted language]]).<br />
<br />
=== Execution & Interpretation ===<br />
{{empty section}}<br />
<br />
== Classification ==<br />
{{empty section}}</div>Jonhttps://en.wikichip.org/w/index.php?title=program&diff=22172program2016-06-18T18:18:19Z<p>Jon: /* Overview */</p>
<hr />
<div>{{cmpen title|Program}}<br />
A '''program''' is an ordered set of operations that are processed by a processing unit (e.g. [[CPU]], [[GPU]], and [[calculator chip]]s) or a processing program (e.g. an [[interpreter]] and [[virtual machine]]). <br />
<br />
A program is usually bundled along with [[documentation]] and any [[dependency|dependent]] [[data]] and [[libraries]]. This bundle is collectively referred to as [[software]]. Such software is further classified into [[system software]] and [[application software]].<br />
<br />
== Overview ==<br />
A program is an ordered set of operations that implements one or more [[algorithm]] in order to solve some problem or complete a task. Programs are usually written by a programmer using a [[programming language]], however they may also be created automatically using specialized code generators. [[Programming]] involves the writing of [[source code]], testing, and modifying the code appropriately. [[Software engineering]] is the discipline under which program development is done which involves the [[software design|design]], [[software construction|construction]], [[software testing|testing]], and [[software maintenance|maintenance]]. <br />
<br />
=== Compilation & Translation ===<br />
Traditionally, programs in human-readable form ([[source code]]) were converted into an [[executable]] file which could be executed directly by the underlying hardware. Over time a number of other alternatives were developed:<br />
<br />
:'''Compiled Program''' is a [[machine code]] version of the of the original program that was in [[source code]] form. The machine code was generated by a [[compiler]] which performed the [[compilation|conversion]]. [[Machine code]] can be executed directly by the underlying hardware. This is the kind of process that goes along with languages such as [[C]], [[C++]], [[Fortran]], and [[Lisp]] (see [[compiled language]]). Compiled programs can take advantage of the raw performance capabilities of the <br />
<br />
:'''Emulated Program''' is a [[p-code]] (or bytecode) version of the original program that was in [[source code]] form. The portable code was generated by a [[compiler]], however, unlike machine code, p-code cannot typically be executed directly by the hardware and instead needs the assistance of a [[virtual machine]] in order to process such code. This is the idea behind languages such as [[Java]] and [[MATLAB]].<br />
<br />
:'''Interpreted Program''' is a program that is identical to the original [[source code]]. In this kind of methodology, the code is interpreted and executed on the fly. This is the idea behind languages such as , [[Python]], and [[PHP]] (see [[interpreted language]]).<br />
<br />
=== Execution & Interpretation ===<br />
{{empty section}}<br />
<br />
== Classification ==<br />
{{empty section}}</div>Jonhttps://en.wikichip.org/w/index.php?title=program&diff=22171program2016-06-18T08:27:06Z<p>Jon: /* Compilation & Translation */</p>
<hr />
<div>{{cmpen title|Program}}<br />
A '''program''' is an ordered set of operations that are processed by a processing unit (e.g. [[CPU]], [[GPU]], and [[calculator chip]]s) or a processing program (e.g. an [[interpreter]] and [[virtual machine]]). <br />
<br />
A program is usually bundled along with [[documentation]] and any [[dependency|dependent]] [[data]] and [[libraries]]. This bundle is collectively referred to as [[software]]. Such software is further classified into [[system software]] and [[application software]].<br />
<br />
== Overview ==<br />
A program is an ordered set of operations that implements one or more [[algorithm]] in order to solve some problem or complete a task. Programs are usually written by a programmer using a [[programming language]], however they may also be created automatically using specialized code generators. [[Programming]] is typically involves writing [[source code]], testing it, and modifying it appropriately. [[Software engineering]] is the discipline under which program development is done which involves the [[software design|design]], [[software construction|construction]], [[software testing|testing]], and [[software maintenance|maintenance]]. <br />
<br />
=== Compilation & Translation ===<br />
Traditionally, programs in human-readable form ([[source code]]) were converted into an [[executable]] file which could be executed directly by the underlying hardware. Over time a number of other alternatives were developed:<br />
<br />
:'''Compiled Program''' is a [[machine code]] version of the of the original program that was in [[source code]] form. The machine code was generated by a [[compiler]] which performed the [[compilation|conversion]]. [[Machine code]] can be executed directly by the underlying hardware. This is the kind of process that goes along with languages such as [[C]], [[C++]], [[Fortran]], and [[Lisp]] (see [[compiled language]]). <br />
<br />
:'''Emulated Program''' is a [[p-code]] (or bytecode) version of the original program that was in [[source code]] form. The portable code was generated by a [[compiler]], however, unlike machine code, p-code cannot typically be executed directly by the hardware and instead needs the assistance of a [[virtual machine]] in order to process such code. This is the idea behind languages such as [[Java]] and [[MATLAB]].<br />
<br />
:'''Interpreted Program''' is a program that is identical to the original [[source code]]. In this kind of methodology, the code is interpreted and executed on the fly. This is the idea behind languages such as , [[Python]], and [[PHP]] (see [[interpreted language]]).<br />
<br />
=== Execution & Interpretation ===<br />
{{empty section}}<br />
<br />
== Classification ==<br />
{{empty section}}</div>Jonhttps://en.wikichip.org/w/index.php?title=program&diff=22170program2016-06-18T08:25:32Z<p>Jon: /* Compilation & Translation */</p>
<hr />
<div>{{cmpen title|Program}}<br />
A '''program''' is an ordered set of operations that are processed by a processing unit (e.g. [[CPU]], [[GPU]], and [[calculator chip]]s) or a processing program (e.g. an [[interpreter]] and [[virtual machine]]). <br />
<br />
A program is usually bundled along with [[documentation]] and any [[dependency|dependent]] [[data]] and [[libraries]]. This bundle is collectively referred to as [[software]]. Such software is further classified into [[system software]] and [[application software]].<br />
<br />
== Overview ==<br />
A program is an ordered set of operations that implements one or more [[algorithm]] in order to solve some problem or complete a task. Programs are usually written by a programmer using a [[programming language]], however they may also be created automatically using specialized code generators. [[Programming]] is typically involves writing [[source code]], testing it, and modifying it appropriately. [[Software engineering]] is the discipline under which program development is done which involves the [[software design|design]], [[software construction|construction]], [[software testing|testing]], and [[software maintenance|maintenance]]. <br />
<br />
=== Compilation & Translation ===<br />
Traditionally, programs in human-readable form ([[source code]]) were converted into an [[executable]] file which could be executed directly by the underlying hardware. Over time a number of other alternatives were developed:<br />
<br />
'''Compiled Program''' is a [[machine code]] version of the of the original program that was in [[source code]] form. The machine code was generated by a [[compiler]] which performed the [[compilation|conversion]]. [[Machine code]] can be executed directly by the underlying hardware. This is the kind of process that goes along with languages such as [[C]], [[C++]], [[Fortran]], and [[Lisp]] (see [[compiled language]]). <br />
<br />
'''Emulated Program''' is a [[p-code]] (or bytecode) version of the original program that was in [[source code]] form. The portable code was generated by a [[compiler]], however, unlike machine code, p-code cannot typically be executed directly by the hardware and instead needs the assistance of a [[virtual machine]] in order to process such code. This is the idea behind languages such as [[Java]] and [[MATLAB]].<br />
<br />
'''Interpreted Program''' is a program that is identical to the original [[source code]]. In this kind of methodology, the code is interpreted and executed on the fly. This is the idea behind languages such as , [[Python]], and [[PHP]] (see [[interpreted language]]).<br />
<br />
=== Execution & Interpretation ===<br />
{{empty section}}<br />
<br />
== Classification ==<br />
{{empty section}}</div>Jonhttps://en.wikichip.org/w/index.php?title=program&diff=22169program2016-06-18T07:40:11Z<p>Jon: /* Overview */</p>
<hr />
<div>{{cmpen title|Program}}<br />
A '''program''' is an ordered set of operations that are processed by a processing unit (e.g. [[CPU]], [[GPU]], and [[calculator chip]]s) or a processing program (e.g. an [[interpreter]] and [[virtual machine]]). <br />
<br />
A program is usually bundled along with [[documentation]] and any [[dependency|dependent]] [[data]] and [[libraries]]. This bundle is collectively referred to as [[software]]. Such software is further classified into [[system software]] and [[application software]].<br />
<br />
== Overview ==<br />
A program is an ordered set of operations that implements one or more [[algorithm]] in order to solve some problem or complete a task. Programs are usually written by a programmer using a [[programming language]], however they may also be created automatically using specialized code generators. [[Programming]] is typically involves writing [[source code]], testing it, and modifying it appropriately. [[Software engineering]] is the discipline under which program development is done which involves the [[software design|design]], [[software construction|construction]], [[software testing|testing]], and [[software maintenance|maintenance]]. <br />
<br />
=== Compilation & Translation ===<br />
There are a couple of ways programs in human-readable ([[source code]]) forms into an [[executable]] or some other form which can be processed and executed:<br />
<br />
* Programs coded in [[source code|human-readable forms]] may be [[compiler|compiled]] to produce [[machine code]]. This is the kind of process that goes along with languages such as [[C]], [[C++]], [[Fortran]], and [[Lisp]] (see [[compiled language]]). <br />
* Programs coded in human-readable forms may be compiled into [[p-code]] to be executed by a [[virtual machine]] or a hardware implementation that can execute that p-code. This is the idea behind languages such as [[Java]].<br />
* Programs in human-readable forms can be interpreted and executed directly by an [[interpreter]] or specialized hardware. This is the idea behind languages such as [[MATLAB]], [[Python]], and [[PHP]] (see [[interpreted language]]).<br />
<br />
=== Execution & Interpretation ===<br />
{{empty section}}<br />
<br />
== Classification ==<br />
{{empty section}}</div>Jonhttps://en.wikichip.org/w/index.php?title=program&diff=22168program2016-06-18T05:59:05Z<p>Jon: </p>
<hr />
<div>{{cmpen title|Program}}<br />
A '''program''' is an ordered set of operations that are processed by a processing unit (e.g. [[CPU]], [[GPU]], and [[calculator chip]]s) or a processing program (e.g. an [[interpreter]] and [[virtual machine]]). <br />
<br />
A program is usually bundled along with [[documentation]] and any [[dependency|dependent]] [[data]] and [[libraries]]. This bundle is collectively referred to as [[software]]. Such software is further classified into [[system software]] and [[application software]].<br />
<br />
== Overview ==<br />
A program is an ordered set of operations that implements one or more [[algorithm]] in order to solve some problem or complete a task. Programs are usually written by a programmer using a [[programming language]], however they may also be created automatically using specialized code generators.<br />
<br />
Programs coded in [[source code|human-readable forms]] are often times [[compiler|compiled]] to produce [[machine code]] (such as in the case of [[C]] and [[C++]]). Programs may also be compiled into [[p-code]] to be executed by a [[virtual machine]], an [[interpreter]], or a hardware implementation that can execute that p-code (such as in the case of [[Java]] and [[Ada]]). Alternatively, programs in human-readable forms may also be interpreted and executed directly by an [[interpreter]] or specialized hardware (such as [[MATLAB]] and some versions of [[BASIC]]).</div>Jonhttps://en.wikichip.org/w/index.php?title=microprocessor&diff=22167microprocessor2016-06-18T05:03:36Z<p>Jon: </p>
<hr />
<div>{{title|Microprocessor (MPU)}}<br />
[[File:KL MF8008.jpg|right|350px]]<br />
A '''microprocessor''' ('''µP''') or a '''Microprocessing Unit''' ('''MPU''') is a device that implements the core elements of a computer system on a single [[integrated circuit]], or as a few integrated circuits operating as a cohesive unit.<br />
<br />
Modern microprocessors typically incorporate the functionality of a [[clock generator|clock]], [[central processing unit]] (CPU), [[arithmetic logic unit]] (ALU), [[floating point unit]] (FPU), [[control unit]] (CU), [[memory management unit]] (MMU), [[interrupt handler|interrupts]], [[input/output]] interfaces, and [[cache]]. Specialized microprocessor may also serve as or include [[graphical processing unit]]s (GPUs), [[digital signal processor|signal processing units]] (DSPs), [[memory]], and various other peripherals.<br />
<br />
== History ==<br />
{{main|history of the microprocessor}}<br />
{{empty section}}<br />
== Functionality==<br />
[[File:IPO (input-process-output).svg|400px|right]]<br />
In the broadest sense, the basic functionality of a microprocessor is to continuously read in digital data consisting of instructions and possibly values; execute them by interpreting the instructions and performing a certain operation on the values; and finally outputs a result.<br />
<br />
While the basic functionality is shared among all microprocessors, they vary greatly in the type and size of data they handle, the kind of operations they support, how they perform those operations, their intended purpose, and their performance characteristics.<br />
<br />
== Classification ==<br />
Most microprocessors can be classified as one of the follow:<br />
<br />
* '''[[general-purpose microprocessors]]''' - the most common form of microprocessors, not designed for any one specific task in mind. Instead they are designed to support a broad array of operations.<br />
* '''[[bit-slice microprocessor]]''' ('''BSM''') - a microprocessor designed as a module intended to be built up like Lego blocks into a desired word size and architecture as needed.<br />
* '''[[system on chip]]''' ('''SoC''') - a microprocessor that contains all the components of a computer system, including the extra functionality that would normally be provided by auxiliary chips, which could include things such as [[wireless]], [[ethernet]], [[SD card]], [[ADC]], [[DAC]], [[LCD driver]]s, and [[FPGA]]. SoCs are capable of running full-fledged modern operating systems with all their features.<br />
* '''[[microcontroller]]''' ('''MCU''') - a microprocessor that contains a few additional components such as [[RAM]], [[ROM]], and programmable [[I/O]] ports primarily designed to control and drive other electronic equipment. MCUs are designed to be embedded, usually in a highly restrictive environment. They usually consume very little power, may run relatively slow, and typically execute individual task-specific programs.<br />
* '''[[floating point unit]]''' ('''FPU''') - is a math microprocessor (or coprocesor) - a microprocessor that specializes in the creation and manipulation of [[floating point]] values.<br />
* '''[[graphics processing unit]]''' ('''GPU''') - is a graphic microprocessor - a microprocessor that specializes in the creation and manipulation of images through a set of optimized geometric operations. Modern graphic microprocessors tend to be highly parallelized, allowing large blocks of visual data to be processed efficiently.<br />
* '''[[digital signal processor]]''' ('''DSP''') - a microprocessor that specializes in the numerical manipulation of signals.<br />
* '''[[coprocesor]]''' - a microprocessor that aides a master microprocessor by either offloading some of its work or by providing additional specialized processing operations, e.g. cryptography, math, graphics, string processing, or I/O interfacing. A coprocessor can act as an extension of the master microprocessor by extending the [[instruction set architecture]] or by acting like another peripheral on the main bus.<br />
<br />
Some microprocessors can be a hybrid combinations of a few of the above. For example, a general-purpose microprocessor might come with an [[integrated GPU]], implying an additional graphic processing unit has been added to the microprocessor to enable it to manipulate visual data more efficiently. Likewise almost all modern desktop microprocessors come with integrated floating point units.<br />
<br />
== Specifications ==<br />
{{main|central processing unit|architecture|microarchitecture|instruction set architecture}}<br />
The technical specifications of microprocessors are derived from the [[microarchitecture]] of the incorporated [[central processing unit|CPU]], the [[semicondcutor]] technology involved, and the properties of the overall system. Some common specifications are summarized below: <br />
<br />
* '''[[logic family|technology]]''' - the semiconductor technology used to create the MPU (e.g. [[CMOS]], [[BiCMOS]], and [[TTL]])<br />
* '''[[semiconductor manufacturing process|process]]''' - the process used to manufacture the MPU - i.e the [[feature size]] and design rules. The feature size on its own (e.g. [[10 µm]]) is usually taken as a synonym for the process.<br />
* '''[[microarchitecture]]''' - the functional description of the underlying circuitry of the microprocessor.<br />
* '''[[word size]]''' - the word size of a microprocessor usually refers specifically to the [[data word size]] used - i.e. highest operand width used to manipulate standard integer values. (this excludes special processing units such as [[SIMD]] and [[FPU]])<br />
* '''[[endianness]]''' - the order of the bytes the microprocessor uses when operating on multi-byte values.<br />
* '''[[base frequency]]''' - the internal operating frequency of CPU's core. It's one of many parameters that are used to assess the performance of a microprocessor.<br />
* '''[[package]]''' - the physical casing of the microprocessor. This most often goes along with a [[socket]], which is the interconnects that sits on the circuit board itself where the package is inserted into.<br />
<br />
== Components ==<br />
{{empty section}}<br />
<br />
== Parallelization ==<br />
{{main|parallelization}}<br />
{{empty section}}<br />
===Instruction-level parallelism===<br />
{{main|instruction-level parallelism}}<br />
<!--<br />
mention Scalar+Superscalar processors<br />
--><br />
===Control parallelism===<br />
{{main|control parallelism}}<br />
{{empty section}}<br />
===Multiple cores===<br />
{{main|multi-core microprocessor}}<br />
{{empty section}}<br />
<br />
== Design ==<br />
[[File:Yunsup Lee holding RISC V prototype chip.jpg|thumb|A prototype of a [[RISC-V]] microprocessor with the [[heat spreader]] removed, showing the exposed [[die]], January 2013]]<br />
{{main|integrated circuit|integrated circuit design}}<br />
{{empty section}}<br />
<!--<br />
Talk about the design cycle, general outline<br />
--><br />
<br />
==Computational power==<br />
{{empty section}}<br />
<br />
== Families==<br />
{{main|microprocessor family}}<br />
{{empty section}}<br />
<br />
== Programmability==<br />
{{empty section}}<br />
<!--<br />
talk about the general idea of programming language -> compiler -> assembler<br />
talk about ISA support for various programming functionality (e.g. RET/CALL/JAL)<br />
--><br />
<br />
== See also ==<br />
* [[List of processor families]]<br />
<br />
== References ==<br />
{{reflist|30em}}<br />
<br />
<br />
<br />
{{Stub}}<br />
[[Category:integrated circuits]]</div>Jonhttps://en.wikichip.org/w/index.php?title=Category:integrated_circuits&diff=22166Category:integrated circuits2016-06-18T05:03:11Z<p>Jon: </p>
<hr />
<div>[[category:electrical engineering]]<br />
[[Category:computer engineering]]</div>Jonhttps://en.wikichip.org/w/index.php?title=Category:software_engineering&diff=22165Category:software engineering2016-06-18T05:00:25Z<p>Jon: Created page with "Category:fundamental categories"</p>
<hr />
<div>[[Category:fundamental categories]]</div>Jonhttps://en.wikichip.org/w/index.php?title=Category:computer_architecture&diff=22164Category:computer architecture2016-06-18T04:55:28Z<p>Jon: </p>
<hr />
<div>[[Category:computer engineering]]</div>Jonhttps://en.wikichip.org/w/index.php?title=Category:computer_engineering&diff=22162Category:computer engineering2016-06-18T04:55:24Z<p>Jon: Jon moved page Category:Computer engineering to Category:computer engineering</p>
<hr />
<div>[[Category:fundamental categories]]</div>Jonhttps://en.wikichip.org/w/index.php?title=Category:Computer_engineering&diff=22163Category:Computer engineering2016-06-18T04:55:24Z<p>Jon: Jon moved page Category:Computer engineering to Category:computer engineering</p>
<hr />
<div>#REDIRECT [[:Category:computer engineering]]</div>Jonhttps://en.wikichip.org/w/index.php?title=Talk:program&diff=22161Talk:program2016-06-18T04:52:25Z<p>Jon: Created page with "{{talk header}}"</p>
<hr />
<div>{{talk header}}</div>Jonhttps://en.wikichip.org/w/index.php?title=program&diff=22160program2016-06-18T04:52:13Z<p>Jon: Created page with "{{cmpen title|Program}} A '''program''' is an organized set of operations that are processed by a processing unit (e.g. CPU, GPU, and calculator chips). A progra..."</p>
<hr />
<div>{{cmpen title|Program}}<br />
A '''program''' is an organized set of operations that are processed by a processing unit (e.g. [[CPU]], [[GPU]], and [[calculator chip]]s). <br />
<br />
A program is usually bundled along with [[documentation]] and any [[dependency|dependent]] [[data]] and [[libraries]]. This bundle is collectively referred to as [[software]]. Such software is further classified into [[system software]] and [[application software]].<br />
<br />
== Overview ==<br />
{{empty section}}</div>Jonhttps://en.wikichip.org/w/index.php?title=User_talk:Jon&diff=22158User talk:Jon2016-06-18T02:22:32Z<p>Jon: Created blank page</p>
<hr />
<div></div>Jonhttps://en.wikichip.org/w/index.php?title=nec/%CE%BCcom-4&diff=20252nec/μcom-42016-05-19T05:04:18Z<p>Jon: </p>
<hr />
<div>{{nec title|μCOM-4}}<br />
{{ic family<br />
| extended family = yes<br />
| title = NEC μCOM-4<br />
| image = <!-- Image representation of the IC family, e.g. "MCS-4.jpg" --><br />
| caption = <!-- description of the image --><br />
| developer = NEC<br />
| manufacturer = NEC<br />
| type = Microcontrollers<br />
| production start = October, 1977<br />
| production end = <!-- production end date, e.g. "January 1, 1985" or "1973" --><br />
| arch = 4-bit<br />
| word = 4 bit<br />
| proc = <!-- process, e.g. "8 μm" --><br />
| tech = nMOS<br />
| clock min = 150 kHz<br />
| clock max = 1 mHz<br />
| package = DIP28<br />
| package 2 = DIP42<br />
}}<br />
The '''μCOM-4''' (or uCOM-4) line is an [[microprocessor family|extended family]] of [[4-bit architecture|4-bit]] [[microcontroller]]s developed by [[NEC]] in the late 1970s. This family was designed to be low-cost, mass-produced, [[microcontroller]]s for [[electronic cash register|ECRs]], industrial controllers, appliance controllers, games, toys, scientific calculators, and other consumer electronics. The μCOM-4 line is based on the {{nec|μPD751}}, the first Japanese single-chip microprocessor.<br />
<br />
==Introduction Date==<br />
{| class="wikitable"<br />
! colspan="4" | 1977 !! colspan="4" | 1980<br />
|-<br />
! Q1 !! Q2 !! Q3 !! Q4 !! Q1 !! Q2 !! Q3 !! Q4 <br />
|-<br />
| {{nec|μCOM-42}} || {{nec|μCOM-43}} || {{nec|μCOM-44}} || {{nec|μCOM-45}} || || || {{nec|μCOM-75}} ||<br />
|}<br />
<br />
== Families ==<br />
The μCOM-4 was original divided into two separate domains:<br />
<br />
===μCOM-42===<br />
The '''{{nec|μCOM-42}}''' was specifically marketed for [[electronic cash register]]s (ECRs), [[Point of Sale]] (POS), and [[electronic scale]] applications. The μCOM-42 chips were specifically designed for controlling 8x4 keyboards, 8-digit displays, and various ECR-type printers. The μCOM-42 had a separate, modified instruction set, compared with the rest of the μCOM-4 families.<br />
<br />
===μCOM-43/44/45===<br />
The '''{{nec|μCOM-43}}/{{nec|μCOM-44|44}}/{{nec|μCOM-45|45}}''' was marketed as a general-purpose microcontroller suited for a large array of low-cost consumer and industrial applications. These MCUs shared a common instruction set.<br />
<br />
* '''{{nec|μCOM-43}}''' - high-end family of MCUs, offering complete support for the entire [[/isa|μCOM-4 ISA]].<br />
* '''{{nec|μCOM-44}}''' - mid-range family of MCUs, providing a subset of 58 instructions at a reduced cost.<br />
* '''{{nec|μCOM-45}}''' - low-end family of MCUs, providing a subset of 58 instructions and less memory at the cheapest price.<br />
<br />
== Design ==<br />
{{empty section}}<br />
<br />
== Instruction set ==<br />
{{main|/isa|l1=μCOM-4 ISA}}<br />
The family was originally split into two sets of ISAs. The {{nec|μCOM-42}} had an instruction set specifically designed to facilitate its use in [[Electronic Cash Register]] (ECR) and Scale products. The {{nec|μCOM-43}}/{{nec|μCOM-44|4}}/{{nec|μCOM-45|5}} were designed to be general purpose microcontrollers.<br />
<br />
== See also ==<br />
* {{nec|μCOM-8}}<br />
<br />
<br />
{{stub}}<br />
{{DEFAULTSORT:μCOM-4}}<br />
[[Category:NEC]]<br />
[[Category:4-bit microprocessors]]<br />
[[Category:1977 microprocessors]]<br />
[[Category:microprocessor families]]<br />
[[Category:NEC μCOM-4]]</div>Jonhttps://en.wikichip.org/w/index.php?title=western_digital/mcp-1600&diff=20251western digital/mcp-16002016-05-19T05:04:02Z<p>Jon: </p>
<hr />
<div>{{wd title|MCP-1600}}<br />
{{ic family<br />
| title = WD MCP-1600<br />
| image = <!-- file "foobar.png" --><br />
| caption = <!-- caption for the file above --><br />
| developer = Digital Equipment Corporation<br />
| developer 2 = Western Digital<br />
| manufacturer = Western Digital<br />
| production start = 1975<br />
| production end = 1985<br />
| arch = 8-bit with 16-bit emulation<br />
| word = 8 bit<br />
| proc = <!-- process, e.g. "8 μm" --><br />
| tech = nMOS<br />
| clock min = 3 MHz<br />
| clock max = 7 MHz<br />
| package = DIP40<br />
}}<br />
The '''MCP-1600''' (or '''MCP1600''') was a [[microprocessor family|family]] of {{arch|8}} multi-chip [[microprocessor]] developed by [[Western Digital]] as a derivative of [[digital equipment corporation|DEC]]'s {{decc|LSI-11}}.<br />
<br />
== Members ==<br />
Theere are 4 chips and an optional extended instruction set with FPU unit.<br />
{| class="wikitable"<br />
|-<br />
! Part !! Description<br />
|-<br />
| {{\|CP1631-07}} || Instruction Set ROM (1)<br />
|-<br />
| {{\|CP1631-10}} || Instruction Set ROM (2)<br />
|-<br />
| {{\|CP1631-15}} || Instruction Set ROM (3) (Extension/[[FPU]])<br />
|-<br />
| {{\|CP1611}} || Data path <br />
|-<br />
| {{\|CP1621}} || Control unit<br />
|}<br />
<br />
== Design ==<br />
{{empty section}}<br />
<br />
== See also==<br />
* {{decc|LSI-11}}<br />
* {{gi|CP1600|GI CP1600}}<br />
<br />
<br />
<br />
{{stub}}</div>Jonhttps://en.wikichip.org/w/index.php?title=Property:technology&diff=20250Property:technology2016-05-19T05:03:40Z<p>Jon: </p>
<hr />
<div>This is a '''[[has type::string]]''' property representing the technology used to manufactured the integrated circuit.<br />
<br />
* Values allowed:<br />
** [[Allows value::CMOS]]<br />
** [[Allows value::nMOS]]<br />
** [[Allows value::pMOS]]<br />
** [[Allows value::Bipolar]]<br />
** [[Allows value::ECL]]<br />
** [[Allows value::Schottky TTL]]<br />
** [[Allows value::Schottky transistor]]</div>Jonhttps://en.wikichip.org/w/index.php?title=Property:rom&diff=20249Property:rom2016-05-19T05:02:10Z<p>Jon: </p>
<hr />
<div>This is a '''[[has type::quantity]]''' property representing the size of the ROM of the microcontroller/IC.<br />
<br />
Units:<br />
* [[Corresponds to::1 MB,megabyte,megabytes]]<br />
* [[Corresponds to::1000 kB,kilobyte,kilobytes]]<br />
* [[Corresponds to::1000000 B,byte,bytes]]<br />
* [[Corresponds to::8000000 b,bit,bits]]<br />
* [[Corresponds to::0.001 GB,gigabyte,gigabytes]]<br />
<br />
== See also ==<br />
* [[Property:ram]]</div>Jonhttps://en.wikichip.org/w/index.php?title=Property:ram&diff=20248Property:ram2016-05-19T05:02:08Z<p>Jon: </p>
<hr />
<div>This is a '''[[has type::quantity]]''' property representing the size of the RAM of the microcontroller/IC.<br />
<br />
Units:<br />
* [[Corresponds to::1 MB,megabyte,megabytes]]<br />
* [[Corresponds to::1000 kB,kilobyte,kilobytes]]<br />
* [[Corresponds to::1000000 B,byte,bytes]]<br />
* [[Corresponds to::8000000 b,bit,bits]]<br />
* [[Corresponds to::0.001 GB,gigabyte,gigabytes]]<br />
<br />
== See also ==<br />
* [[Property:rom]]</div>Jonhttps://en.wikichip.org/w/index.php?title=mitsubishi/m350xx&diff=20247mitsubishi/m350xx2016-05-19T05:00:58Z<p>Jon: </p>
<hr />
<div>{{mitsu title|M350xx}}<br />
{{ic family<br />
| title = M350xx Series<br />
| image = <!-- Image representation of the IC family, e.g. "MCS-4.jpg" --><br />
| caption = <!-- description of the image --><br />
| no image = yes<br />
| developer = Mitsubishi<br />
| developer 2 = Renesas<br />
| manufacturer = Mitsubishi<br />
| manufacturer 2 = Renesas<br />
| type = microcontrollers<br />
| production start = 1997<br />
| production end = <!-- production end date, e.g. "January 1, 1985" or "1973" --><br />
| release = <!-- release date, e.g. "January 1, 1985" or "1973" --><br />
| arch = OSD controller<br />
| tech = CMOS<br />
| package = SOP20<br />
| package 2 = QFP64<br />
}}<br />
The '''M350xx''' is a series of TV [[on-screen display controller]]s (OSD) introduce by [[Mitsubishi]] (later [[Renesas]]) in 1997.<br />
<br />
== Members ==<br />
{| class="wikitable sortable"<br />
|-<br />
! Part !! Screen !! Max Chars !! Char Size !! Locations !! Chars Available !! Notes <br />
|-<br />
| {{\|M35010}} || 24x10 || 240 || 4x4 || 128x64 || 64 || background composition<br />
|-<br />
| {{\|M35011}} || 24x10 || 240 || 4x4 || 128x64 || 128 || background composition<br />
|-<br />
| {{\|M35012}} || 24x10 || 240 || 4x4 || 62x64 || 256 || background composition<br />
|-<br />
| {{\|M35013}} || 24x10 || 240 || 4x4 || 62x64 || 128 || background composition<br />
|-<br />
| {{\|M35014}} || 24x10 || 240 || 4x4 || 62x64 || 64 || background composition<br />
|-<br />
| {{\|M35015}} || 24x10 || 240 || 4x4 || 62x64 || 512 || background composition<br />
|-<br />
| {{\|M35017}} || 24x10 || 240 || 4x4 || 62x64 || 128 || background composition<br />
|-<br />
| {{\|M35040}} || 24x10 || 240 || 4x4 || 62x64 || 128 || 8-color char color/background/border<br />
|-<br />
| {{\|M35041}} || 24x10 || 240 || 4x4 || 62x64 || 256 || 8-color char color/background/border<br />
|-<br />
| {{\|M35043}} || 24x12 || 128 || 4x4 || 1000x1023 || 128 || 8-color char color/background/border<br />
|-<br />
| {{\|M35044}} || 24x12 || 128 || 4x4 || 1000x1023 || 192 || 8-color char color/background/border<br />
|-<br />
| {{\|M35045}} || 24x12 || 128 || 4x4 || 1000x1023 || 256 || 8-color char color/background/border<br />
|-<br />
| {{\|M35046}} || 24x12 || 288 || 4x4 || 1000x1023 || 256 || 8-color char color/background/border<br />
|-<br />
| {{\|M35047}} || 24x12 || 288 || 4x4 || 2007x2047 || 256 || 8-color char color/background/border<br />
|-<br />
| {{\|M35048}} || 24x12 x2 || 288 x2 || 4x2 || 472x255 || || 8-color char color/background/border<br />
|-<br />
| {{\|M35049}} || 24x12 x2 || 288 x2 || 4x2 || 472x255 || 256 (1/2) || 8-color char color/background/border<br />
|-<br />
| {{\|M35051}} || 24x10 || 240 || 4x4 || 62x64 || 128 || <br />
|-<br />
| {{\|M35052}} || 24x10, 32x7 || 240 || 4x4 || 240x246 || 256 || background composition<br />
|-<br />
| {{\|M35053}} || 24x10, 32x7 || 240 || 4x4 || 240x256 || 256 || background composition<br />
|-<br />
| {{\|M35054}} || 24x10, 32x7 || 240 || 4x4 || 240x256 || 128 || background composition<br />
|-<br />
| {{\|M35055}} || 24x10, 32x7 || 240 || 4x4 || 240x256 || 256 || background composition<br />
|-<br />
| {{\|M35060}} || 40x17 || 680 || 2x2 || 480x235 || 256 || 8-color char color/background/border<br />
|-<br />
| {{\|M35061}} || 40x17 || 680 || 2x2 || 486x235 || || 8-color char color/background/border<br />
|-<br />
| {{\|M35062}} || 40x17, 40x16 || 680 || 2x2 || 480x235 || 128 || 8-color char color/background/border<br />
|-<br />
| {{\|M35063}} || 40x17, 40x16 || 680 || 2x2 || 486x235 || 128 || 8-color char color/background/border<br />
|-<br />
| {{\|M35070}} || 24x12 x2 || 288 x2 || 4x2 || 2007x1023 || 256 (1/2) || 8-color char color/background/border<br />
|-<br />
| {{\|M35071}} || 24x12 x2 || 288 x2 || 4x2 || 2007x1023 || 256 (1) 128 (2) || <br />
|-<br />
| {{\|M35072}} || 24x12 x2 || 288 x2 || 4x2 || 2007x2047 || 256 (1/2) || 8-color char color/background/border<br />
|-<br />
| {{\|M35074}} || 24x12 || 288 || 4x4 || 4055x2047 || 511 || 128-color char color/background/border<br />
|-<br />
| {{\|M35075}} || 24x12 || 288 || 4x2 || 2007x2047 || 256 || 8-color char color/background/border<br />
|-<br />
| {{\|M35076}} || 24x12 x2 || 288 x2 || 4x2 || 2007x1023 || 256 (1/2) || 8-color char color/background/border<br />
|}<br />
* "x2" indicates 2 pages<br />
<br />
Bitmap pattern display controllers<br />
{| class="wikitable sortable"<br />
|-<br />
! Part !! Screen !! Bit map !! Analog RGB !! Digital RGB<br />
|-<br />
| {{\|M35080}} || 128x86 x2, 192x64 x2, 256x48 x2, 384x32 x2, 32x384 x2, 48x256 x2, 64x192 x2, 86x128 x2 || 128x96x9 x2 || 260K (1) / 512 (2) || 512 (1/2)<br />
|}<br />
<br />
== Architecture ==<br />
{{empty section}}<br />
<br />
<br />
{{stub}}</div>Jonhttps://en.wikichip.org/w/index.php?title=motorola/mc14154x&diff=20246motorola/mc14154x2016-05-19T05:00:54Z<p>Jon: </p>
<hr />
<div>{{motorola title|MC14154x}}<br />
{{ic family<br />
| title = MC14154x Series<br />
| image = <!-- Image representation of the IC family, e.g. "MCS-4.jpg" --><br />
| caption = <!-- description of the image --><br />
| no image = yes<br />
| developer = Motorola<br />
| manufacturer = Motorola<br />
| type = Microcontrollers<br />
| production start = <br />
| production end = <!-- production end date, e.g. "January 1, 1985" or "1973" --><br />
| release = <!-- release date, e.g. "January 1, 1985" or "1973" --><br />
| arch = OSD controller<br />
| proc = <br />
| tech = CMOS<br />
| package = DIP16<br />
| package 2 = DIP24<br />
}}<br />
The '''MC14154x''' was a series of TV [[on-screen display controller]]s (OSD) introduce by [[Motorola]].<br />
<br />
== Members ==<br />
{| class="wikitable sortable"<br />
|-<br />
! Part !! Dots/Line !! Char Array !! Char Size !! Chars Available !! Notes <br />
|-<br />
| {{\|MC141540}} || 320 ([[CGA]]) || 10x24 || 10x16 || 128 || 4 selectable colors per row<br />
|-<br />
| {{\|MC141541}} || 320 ([[CGA]]), 480 ([[EGA]]) || 10x24 || 10x16 || 120+8 Prog || char-by-char coloring; 8 programmable glyphs<br />
|-<br />
| {{\|MC141542}} || 384 ([[CGA]]), 768 ([[SVGA]]) || 15x30 || 10x16 || 256 || Multilingual support; 256 glyphs = 250 standard + 16 multi-color<br />
|-<br />
| {{\|MC141543}} || 320 ([[CGA]]), 480 ([[EGA]]), 640 ([[VGA]]) || 15x30 || 10x16 || 128 || char-by-char coloring<br />
|-<br />
| {{\|MC141544}} || variable || 15x30 || 12x18 || 256 || Multilingual support; 256 glyphs = 250 standard + 16 multi-color<br />
|-<br />
| {{\|MC141545}} || 384 ([[CGA]]), 768 ([[SVGA]]) || 15x30 || 12x18 || 256 || Multilingual support; 256 glyphs = 250 standard + 16 multi-color<br />
|-<br />
| {{\|MC141546}} || 384 ([[CGA]]), 768 ([[SVGA]]) || 15x30 || 12x18 || 128 || <br />
|-<br />
| {{\|MC141547}} || 384 ([[CGA]]), 768 ([[SVGA]]) || 15x30 || 12x18 || 128 ||<br />
|-<br />
| {{\|MC141548}} || 320 ([[CGA]]), 480 ([[EGA]]), 640 ([[VGA]]) || 15x30 || 10x16 || 248+8 Prog || Multilingual support; 8 programmable glyphs<br />
|-<br />
| {{\|MC141549}} || 320 ([[CGA]]), 480 ([[EGA]]), 640 ([[VGA]]) || 15x30 || 10x16 || 248+8 Prog || Multilingual support; 8 programmable glyphs<br />
|}<br />
<br />
<br />
<br />
{{stub}}</div>Jonhttps://en.wikichip.org/w/index.php?title=rockwell_international/pps-4-1&diff=20245rockwell international/pps-4-12016-05-19T05:00:45Z<p>Jon: </p>
<hr />
<div>{{rockwell title|PPS-4/1}}<br />
{{ic family<br />
| title = Rockwell PPS-4/1<br />
| image = <br />
| caption = <br />
| developer = Rockwell International<br />
| manufacturer = Rockwell International<br />
| production start = 1976<br />
| production end = <br />
| arch = 4-bit words, 8-bit instruction<br />
| word = 4 bit<br />
| proc = <!-- process, e.g. "8 μm" --><br />
| tech = pMOS<br />
| clock min = 40 kHz<br />
| clock max = 100 kHz<br />
| package = QIL42<br />
}}<br />
The '''PPS-4/1''' (Parallel Processing System - 4-bit word - 1 chip) was a [[microprocessor family|family]] of {{arch|4}} [[microcontroller]]s chips designed by [[Rockwell International]] and introduce in 1st quarter of 1976. The PPS-4/1 is the third iteration of the {{rockwell|PPS-4|original PPS-4}}. The PPS-4/1 were architecturally identical to the {{rockwell|PPS-4}} and {{rockwell|PPS-4/2}} with the addition of a [[clock generator]] and [[program memory]] incorporated internally, making it a single-chip system (hence the "/1"). It's full compatible with all the original PPS-4 CPU and all the other parts.<br />
<br />
== Members ==<br />
The PPS-4/1 were considerably slower than their {{rockwell|pps-4|multi-chip counterparts}}, operating at only up to half of their frequency (40 KHz-100 KHz).<br />
{| class="wikitable sortable"<br />
|-<br />
! Part !! RAM !! ROM !! I/O Ports !! Notes<br />
|-<br />
| {{\|MM75}} || 48x4 bits || 640x8 bits || 22 || Reduced I/O<br />
|-<br />
| {{\|MM76}} || 48x4 bits || 640x8 bits || 31 ||<br />
|-<br />
| {{\|MM76C}} || 48x4 bits || 640x8 bits || 39 ||<br />
|-<br />
| {{\|MM76D}} || 48x4 bits || 640x8 bits || 37 ||<br />
|-<br />
| {{\|MM76E}} || 48x4 bits || 1024x8 bits || 31 ||<br />
|-<br />
| {{\|MM77}} || 96x4 bits || 1344x8 bits || 31 ||<br />
|-<br />
| {{\|MM78}} || 128x4 bits || 2048x8 bits || 31 ||<br />
|}<br />
== See also==<br />
* {{rockwell|PPS-4}}<br />
<br />
<br />
{{stub}}</div>Jonhttps://en.wikichip.org/w/index.php?title=rockwell_international/pps-4&diff=20244rockwell international/pps-42016-05-19T05:00:42Z<p>Jon: </p>
<hr />
<div>{{rockwell title|PPS-4}}<br />
{{ic family<br />
| title = Rockwell PPS-4<br />
| image = Rockwell PPS4 in Sharp PC-1001.jpg<br />
| caption = Rockwell PPS-4 found in the {{sharp|PC/PC-1001|PC-1001}} programmable calculator. PPS-4 (part {{\|10660}}) on the upper-right corner along with the {{\|10706}} clock generator, GP I/O {{\|10696}}, ROM ({{\|A05|A05xx}}), RAM ({{\|10432}}), and a [[7400 series]] 74154 decoder. <br />
| developer = Rockwell International<br />
| manufacturer = Rockwell International<br />
| production start = August, 1972<br />
| production end = 1981<br />
| arch = 4-bit words, 8-bit instruction<br />
| word = 4 bit<br />
| proc = <!-- process, e.g. "8 μm" --><br />
| tech = pMOS<br />
| clock min = 40 kHz<br />
| clock max = 256 kHz<br />
| package = QIL42<br />
}}<br />
The '''PPS-4''' (Parallel Processing System - 4-bit word) was a [[microprocessor family|family]] of {{arch|4}} [[microprocessor]] chips designed by [[Rockwell International]] and introduce in 3rd quarter of 1972.<br />
<br />
The original PPS-4 chipset was designed to provide complete functionality in three chips - [[CPU]], [[program memory]], and a [[clock generator]]. A later version known as the {{\|11660|PPS-4/2}} ("/2" denoting a two-chip system) eliminated the external clock generator chip by incorporating it internally. A third variation known as the {{rockwell|PPS-4/1}} ("/1" being a single-chip microcomputer) was actually a [[microcontroller]], including the program memory internally.<br />
<br />
== History ==<br />
{{empty section}}<br />
<br />
== Members ==<br />
{| class="wikitable sortable"<br />
|-<br />
! Part !! Function !! Description<br />
|-<br />
| {{\|10660}} || [[CPU]] || Original "'''PPS-4'''" CPU<br />
|-<br />
| {{\|11660}} || [[CPU]] || "'''PPS-4/2'''" CPU<br />
|-<br />
| {{\|10660|12660}} || [[CPU]] || Same as 10660<br />
|-<br />
| {{\|10432}} || [[RAM]] ||<br />
|-<br />
| {{\|10686}} || General purpose I/O ||<br />
|-<br />
| {{rockwell|10696}} || General purpose I/O ||<br />
|-<br />
| {{\|10706}} || [[clock]] || <br />
|-<br />
| {{\|10731}} || com data interface ||<br />
|-<br />
| {{\|10738}} || Bus I/O ||<br />
|-<br />
| {{\|10736}} || dot matrix printer controller ||<br />
|-<br />
| {{\|10788}} || keyboard/display controller ||<br />
|-<br />
| {{\|10789}} || printer controller ||<br />
|-<br />
| {{\|10815}} || keyboard/printer controller ||<br />
|-<br />
| {{\|10930}} || serial data controller ||<br />
|-<br />
| {{\|11049}} || [[interval timer]] ||<br />
|-<br />
| {{\|15380}} || dot matrix printer controller ||<br />
|-<br />
| {{\|A05xx}} || [[ROM]] || <br />
|-<br />
| {{\|A07xx}} || [[ROM]] || <br />
|-<br />
| {{\|A08xx}} || [[ROM]] || <br />
|-<br />
| {{\|A17xx}} || [[ROM]] || <br />
|-<br />
| {{\|A21xx}} || [[ROM]] || <br />
|-<br />
| {{\|A22xx}} || [[ROM]] || <br />
|-<br />
| {{\|A23xx}} || [[ROM]] || <br />
|-<br />
| {{\|A52xx}} || [[ROM]] || <br />
|}<br />
<br />
== 2nd source ==<br />
[[National semiconductor]] later became a second source for the PPS-4.<br />
<br />
== Applications ==<br />
While not as known as the other chips like the {{intel|MCS-4}}, the PPS-4 certainly never received as much mainstream exposure. Nevertheless, it did find its way into many industrial and consumer products such as toys, desktop calculators, games, and other electronic appliances.<br />
<br />
== Design ==<br />
{{empty section}}<br />
<br />
== Instruction set ==<br />
{{empty section}}<br />
<br />
== Documents ==<br />
* [[:File:rockwell pps-4 data sheet (1974).pdf|Orignal PPS-4 System Manual (1974)]]</div>Jonhttps://en.wikichip.org/w/index.php?title=ti/tms1000&diff=20243ti/tms10002016-05-19T05:00:09Z<p>Jon: </p>
<hr />
<div>{{ti title|TMS1000 Series}}{{confuse|TMS0100}}<br />
{{ic family<br />
| title = TI TMS1000 Series<br />
| image = <!-- Image representation of the IC family, e.g. "MCS-4.jpg" --><br />
| caption = <!-- description of the image --><br />
| developer = Texas Instruments<br />
| manufacturer = Texas Instruments<br />
| production start = 1974<br />
| production end = 1981<br />
| release = 1974<br />
| arch = <br />
| word = 4 bit<br />
| proc = 8 μm<br />
| tech = pMOS<br />
| tech 2 = nMOS<br />
| tech 3 = CMOS<br />
| clock min = 100 KHz<br />
| clock max = 400 KHz<br />
| package = DIP28<br />
| package 2 = DIP40<br />
}}<br />
The '''TMS1000 Series''' (or TMS 1000) was a [[microprocessor family|family]] of [[4-bit architecture|4-bit]] [[microcontroller]]s designed and manufactured by [[Texas Instruments]] in the early 1970s. Originally made using [[pMOS logic|pMOS]] technology, TI later expended the family into [[nMOS logic|nMOS]] and [[CMOS]].<br />
<br />
==History==<br />
In September of 1971, TI finished the design for their {{ti|TMS0100}} single-chip calculators. Designs where done by the [[Texas Instruments]] engineers Gary Boone and Michael Cochran. Based on their design of the {{ti|TMX1795}}, Gary patented the invention for a single-chip processing machine on Aug 31, 1971. On Sep 4 1973, he was awarded [http://www.google.com/patents/US3757306 U.S. Patent 3,757,306]. Building on top of their experiences with the {{ti|TMS0100}} and Boone's [[8-bit architecture|8-bit]] microprocessor prototype they went on to design the 4-bit TMS1000 microcontroller series. Boone was later awarded [https://www.google.com/patents/US4074351 U.S. Patent 4,074,351] for the modern microcontroller. <br />
<br />
After being slightly refined, the chip was released to general market in 1974. A few dozen different variations were created with various ROM and RAM sizes. Due to its cheap price, the TMS1000 family enjoyed a tremendous success in consumer electronics.<br />
<br />
== Applications==<br />
The TMS1000 was cheap enough to be used in everything from TI's own calculators to microwave ovens, washers, jukeboxes, video games, toys, games, and thousands of other electronic products. Over one hundred million processors were sold.<br />
<br />
==Museum displays==<br />
* [http://www.computerhistory.org/collections/catalog/102711697 TMS1000], [[Computer History Museum]] - note that the description on the museum website is actually incorrect. The chip is correctly identified as ''TMS1000NL'', however the description is confusing it with TI's primitive calculator chip ''TMS1802C'' of the {{ti|TMS0100}} series, which is unrelated to the TMS1000 series, despite the similar numbering used.<br />
<br />
== Parts ==<br />
{| class="wikitable sortable"<br />
! Part Number !! ROM !! RAM !! I/O Pins !! Technology !! Notes<br />
|-<br />
| [[/tms1000|TMS1000]] || 1KB || 64x4 || 23 || [[pMOS logic|pMOS]] ||<br />
|-<br />
| [[/tms1000c|TMS1000C]] || 1KB || 64x4 || 23 || [[CMOS]] || Identical to [[/tms1000|TMS1000]], CMOS<br />
|-<br />
| [[/tms1018|TMS1018]] || - || 64x4 || 4 || pMOS ||<br />
|-<br />
| [[/tms1070|TMS1070]] || 1KB || 64x4 || || pMOS || Built-in VF display controllers<br />
|-<br />
| [[/tms1098|TMS1098]] || - || 128x4 || || pMOS ||<br />
|-<br />
| [[/tms1099|TMS1099]] || - || 64x4 || || pMOS ||<br />
|-<br />
| [[/tms1099c|TMS1099C]] || - || 64x4 || || CMOS || Identical to [[/tms1099|TMS1099]], CMOS<br />
|-<br />
| [[/tms1100|TMS1100]] || 2KB || 128x4 || || pMOS ||<br />
|-<br />
| [[/tms1117|TMS1117]] || 2KB || 128x4 || || pMOS ||<br />
|-<br />
| [[/tms1200|TMS1200]] || 1KB || 64x4 || || pMOS ||<br />
|-<br />
| [[/tms1200c|TMS1200C]] || 1KB || 64x4 || || CMOS || Identical to [[/tms1200|TMS1200]], CMOS<br />
|-<br />
| [[/tms1270|TMS1270]] || 1KB || 64x4 || || pMOS ||<br />
|-<br />
| [[/tms1300|TMS1300]] || 2KB || 128x8 || 23 || pMOS ||<br />
|-<br />
| [[/tms1400|TMS1400]] || 4KB || 128x4 || 22 || pMOS ||<br />
|-<br />
| [[/tms1600|TMS1600]] || 4KB || 128x4 || 33 || pMOS ||<br />
|-<br />
| [[/tms1700|TMS1700]] || 512B|| 32x4 || 21 || pMOS ||<br />
|-<br />
| [[/tms2000|TMS2000]] || 1KB || 64x4 || || [[nMOS logic|nMOS]] || [[nMOS logic|nMOS]] version of [[/tms1000|TMS1000]]<br />
|-<br />
| [[/tms2100|TMS2100]] || 2KB || 128x4 || || nMOS || [[nMOS logic|nMOS]] version of [[/tms1100|TMS1100]]<br />
|-<br />
| [[/tms2200|TMS2200]] || 1KB || 64x4 || || nMOS || [[nMOS logic|nMOS]] version of [[/tms1200|TMS1200]]<br />
|-<br />
| [[/tms2300|TMS2300]] || 2KB || 128x8 || || nMOS || [[nMOS logic|nMOS]] version of [[/tms1300|TMS1300]]<br />
|-<br />
| [[/tms2098|TMS2098]] || - || 128x4 || || nMOS || [[engineering sample]]<br />
|-<br />
| [[/tms2099|TMS2099]] || - || 64x4 || || nMOS || [[engineering sample]]<br />
|}<br />
<br />
== Architecture ==<br />
{{expand section}}<br />
The TMS 1000 had a relatively simple design with only 43 instructions and 2 general purpose registers. Similar to the [[Intel 4004]], the chip only had a single level of stack and no interrupts.<br />
<br />
==Documents==<br />
* [[:File:TMS1000 Series Programmer's reference manual.pdf|TMS1000 Series Programmer's Reference Manual]], 1975<br />
* [[:File:TMS 1000 Series Data Manual Dec76.pdf|TMS1000 Series Data Manua]], 1976<br />
* [[:File:TMS 1000 Series MOS LSI One-Chip Microcomputers 1975.pdf|TMS1000 Series]], 1975<br />
<br />
== System ==<br />
<br />
=== Games ===<br />
* {{\|TMS0970}}, 1977, [[Milton Bradley Comp IV]]<br />
* {{\|TMS0970}}, 1977, [[Code Name: Sector]]<br />
* {{\|TMS1100}}, 1979, [[MicroVision Blockbuster]]<br />
* {{\|TMS1100}}, 1979, [[MicroVision Star Trek Phaser Strike]]<br />
* {{\|TMS1100}}, 1979, [[MicroVision Mindbuster]]<br />
* {{\|TMS1100}}, 1979, [[MicroVision Vegas Slots]]<br />
* {{\|TMS1100}}, 1979, [[MicroVision Bowling]]<br />
* {{\|TMS1100}}, 1979, [[MicroVision Connect Four]]<br />
* {{\|TMS1400}}, 1979, [[Kosmos astro]]<br />
* {{\|TMS1100}}, 1980, [[MicroVision Baseball]]<br />
* {{\|TMS1100}}, 1980, [[MicroVision Pinball]]<br />
* {{\|TMS1100}}, 1980, [[MicroVision Sea Duel]]<br />
* {{\|TMS1100}}, 1980, [[MicroVision Alien Raiders]]<br />
* {{\|TMS1100}}, 1980, [[Tomy Atomic Pinball]]<br />
* {{\|TMS1400}}, 1980, [[Parker Brothers Bank Shot]]<br />
* {{\|TMS1400}}, 1980, [[Parker Brothers Split Second]]<br />
* {{\|TMS1400}}, 1980, [[Coleco Total Control 4]]<br />
* {{\|TMS1100}}, 1981, [[MicroVision Cosmic Hunter]]<br />
* {{\|TMS1100}}, 1982, [[MicroVision Super Blockbuster]]<br />
* {{\|TMS1100}}, 1985, [[Capsela CRC2000]]<br />
<br />
==References ==<br />
{{reflist}}<br />
<br />
<br />
{{stub}}</div>Jonhttps://en.wikichip.org/w/index.php?title=nec/%CE%BCcom-45&diff=20242nec/μcom-452016-05-19T05:00:06Z<p>Jon: </p>
<hr />
<div>{{nec title|μCOM-45}}{{ic family<br />
| title = NEC μCOM-45 Family<br />
| image = <!-- Image representation of the IC family, e.g. "MCS-4.jpg" --><br />
| caption = <!-- description of the image --><br />
| developer = NEC<br />
| manufacturer = NEC<br />
| type = Microcontrollers<br />
| production start = November, 1977<br />
| production end = <!-- production end date, e.g. "January 1, 1985" or "1973" --><br />
| arch = 4-bit word, 10-bit instructions<br />
| isa = μCOM-4<br />
| word = 4 bit<br />
| proc = <!-- process, e.g. "8 μm" --><br />
| tech = pMOS<br />
| clock min = 150 kHz<br />
| clock max = 440 kHz<br />
| package = DIP28<br />
| package 2 = DIP42<br />
}}<br />
The '''μCOM-45''' (or uCOM-45) was [[microprocessor family|family]] of general-purpose {{arch|4}} [[microcontroller]]s, part of the {{nec|μCOM-4|μCOM-4 extended family}}. This family offered a subset of the {{nec|μcom-4/isa|full μCOM-4 ISA}}, offered a reduced amount of memory and was marketed as the low-end series among the μCOM-4 lines.<br />
<br />
== Microcontrollers ==<br />
<!-- NOTE: <br />
This table is generated automatically from the data in the actual articles.<br />
If a microprocessor is missing from the list, an appropriate article for it needs to be<br />
created and tagged appropriately. (see/copy existing article)<br />
<br />
Missing a chip? please dump its name here: http://en.wikichip.org/wiki/WikiChip:wanted_chips<br />
--><br />
<table class="wikitable sortable"><br />
<tr><th colspan="9" style="background:#D6D6FF;">μCOM-45 Microcontrollers</th></tr><br />
<tr><th>Model</th><th>Part</th><th>Introduction</th><th>ROM</th><th>RAM</th><th>Pins</th></tr><br />
{{#ask: [[Category:microcontroller models by nec]] [[microcontroller family::μCOM-45]]<br />
|?full page name<br />
|?model number<br />
|?part number<br />
|?first launched<br />
|?rom breakdown<br />
|?ram breakdown<br />
|?pin count<br />
|format=template<br />
|template=proc table 2<br />
|userparam=7<br />
|mainlabel=-<br />
}}<br />
</table><br />
<br />
== Design ==<br />
{{empty section}}<br />
<br />
== μCOM-45 Instruction Set ==<br />
{{main|nec/μcom-4/isa|l1=μCOM-4 ISA}}<br />
The μCOM-45 ISA supported a strict subset of the entire μCOM-4 ISA, composed of 58 instructions.<br />
<br />
== See Also ==<br />
* {{nec|μCOM-4}}<br />
* {{nec|μCOM-8}}<br />
<br />
<br />
{{stub}}</div>Jonhttps://en.wikichip.org/w/index.php?title=nec/%CE%BCcom-44&diff=20241nec/μcom-442016-05-19T05:00:02Z<p>Jon: </p>
<hr />
<div>{{nec title|μCOM-44}}{{ic family<br />
| title = NEC μCOM-44 Family<br />
| image = <!-- Image representation of the IC family, e.g. "MCS-4.jpg" --><br />
| caption = <!-- description of the image --><br />
| developer = NEC<br />
| manufacturer = NEC<br />
| type = Microcontrollers<br />
| production start = August, 1977<br />
| production end = <!-- production end date, e.g. "January 1, 1985" or "1973" --><br />
| arch = 4-bit word, 10-bit instructions<br />
| isa = μCOM-4<br />
| word = 4 bit<br />
| proc = <!-- process, e.g. "8 μm" --><br />
| tech = pMOS<br />
| clock min = 150 kHz<br />
| clock max = 440 kHz<br />
| package = DIP42<br />
}}<br />
The '''μCOM-44'' (or uCOM-44)' was [[microprocessor family|family]] of general-purpose {{arch|4}} [[microcontroller]]s, part of the {{nec|μCOM-4|μCOM-4 extended family}}. This family offered a subset of the {{nec|μcom-4/isa|full μCOM-4 ISA}} and was sold at a reduced price accordingly.<br />
<br />
== Microcontrollers ==<br />
<!-- NOTE: <br />
This table is generated automatically from the data in the actual articles.<br />
If a microprocessor is missing from the list, an appropriate article for it needs to be<br />
created and tagged appropriately. (see/copy existing article)<br />
<br />
Missing a chip? please dump its name here: http://en.wikichip.org/wiki/WikiChip:wanted_chips<br />
--><br />
<table class="wikitable sortable"><br />
<tr><th colspan="9" style="background:#D6D6FF;">μCOM-44 Microcontrollers</th></tr><br />
<tr><th>Model</th><th>Part</th><th>Introduction</th><th>ROM</th><th>RAM</th><th>Pins</th></tr><br />
{{#ask: [[Category:microcontroller models by nec]] [[microcontroller family::μCOM-44]]<br />
|?full page name<br />
|?model number<br />
|?part number<br />
|?first launched<br />
|?rom breakdown<br />
|?ram breakdown<br />
|?pin count<br />
|format=template<br />
|template=proc table 2<br />
|userparam=7<br />
|mainlabel=-<br />
}}<br />
</table><br />
<br />
== Design ==<br />
{{empty section}}<br />
<br />
== μCOM-44 Instruction Set ==<br />
{{main|nec/μcom-4/isa|l1=μCOM-4 ISA}}<br />
The μCOM-44 ISA supported a strict subset of the entire μCOM-4 ISA, composed of 58 instructions.<br />
<br />
== See Also ==<br />
* {{nec|μCOM-4}}<br />
* {{nec|μCOM-8}}<br />
<br />
<br />
{{stub}}</div>Jonhttps://en.wikichip.org/w/index.php?title=fairchild/pps-25&diff=20240fairchild/pps-252016-05-19T04:57:22Z<p>Jon: </p>
<hr />
<div>{{fairchild title|PPS-25}}<br />
{{ic family<br />
| title = Fairchild PPS-25<br />
| image = <!-- Image representation of the IC family, e.g. "MCS-4.jpg" --><br />
| caption = <!-- description of the image --><br />
| developer = Fairchild Semiconductor<br />
| manufacturer = Fairchild Semiconductor<br />
| type = microprocessors<br />
| production start = 1971<br />
| arch = 4-bit<br />
| word = 4 bit<br />
| proc = <!-- process, e.g. "8 μm" --><br />
| tech = pMOS<br />
| clock = 400 kHz<br />
| package = DIP40<br />
}}<br />
The '''PPS-25''' (also '''PPS25''') was a [[microprocessor family|family]] of [[4-bit architecture|4-bit]] multi-chip [[microprocessor]] developed by [[Fairchild]] and released in 1971/2. While there is no definitive starting production date available, there is evidence pointing to early 1971/2 (some early books placing it ahead of the {{intel|4004}})<ref>Jack Belzer, Albert G. Holzman, Allen Kent (Jul 1, 1978). Encyclopedia of Computer Science and Technology: Volume 10 - Linear and Matrix Algebra to Microorganisms: Computer-Assisted Identification. [http://books.google.com/books?id=iBsUXrgKBKkC&lpg=PA401&ots=i6F1IL5YAO&pg=PA401 page 401]</ref>. This family was very short-lived as within a few years, Fairchild shifted their effort toward more advanced designs such as their macrologic families {{fairchild|4700}}/{{fairchild|9400}} and what became their flagship product, the {{fairchild|F8}}.<br />
<br />
<br />
{{lost chip|about=the Fairchild PPS-25 family}}<br />
<br />
==Members==<br />
{| class="wikitable"<br />
! colspan="2" | Family Members<br />
|-<br />
! Part !! Description<br />
|-<br />
| {{\|3805}} || [[ALU]]<ref>Electronic & Power [http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=5181054 17 May 1973]</ref><br />
|-<br />
| {{\|3806}} || Control and timing unit<br />
|}<br />
<br />
==References ==<br />
{{reflist}}<br />
<br />
<br />
{{stub}}<br />
{{DEFAULTSORT:PPS-25, Fairchild}}<br />
<br />
[[Category:4-bit microprocessors]]<br />
[[Category:1972 microprocessors]]<br />
[[Category:Fairchild Semiconductor microprocessors]]<br />
[[Category:Microprocessor stubs]]</div>Jonhttps://en.wikichip.org/w/index.php?title=american_microsystems/s2000&diff=20239american microsystems/s20002016-05-19T04:57:14Z<p>Jon: </p>
<hr />
<div>{{ami title|S2000}}<br />
{{ic family<br />
| title = AMI S2000<br />
| image = <!-- Image representation of the IC family, e.g. "MCS-4.jpg" --><br />
| caption = <!-- description of the image --><br />
| developer = American Microsystems<br />
| manufacturer = American Microsystems<br />
| type = microcontrollers<br />
| production start = 1977<br />
| arch = 4-bit <br />
| isa = S2000<br />
| word = 4 bit<br />
| proc = <!-- process, e.g. "8 μm" --><br />
| tech = nMOS<br />
| clock = <!-- clock speed, e.g. "740 kHz" IF RANGE, USE PARAM BELOW! --><br />
| clock min = 100 kHz<br />
| clock max = 1 MHz<br />
| package = DIP 40<br />
}}<br />
The '''S2000 Family''' is a [[microprocessor family|family]] of [[4-bit architecture|4-bit]] [[microcontroller]]s developed by [[American Microsystems]] in mid 1970. The chips came with 52/59 instructions - all single-cycle - operating at [[μs|4.5μs]]. <br />
<br />
== Members ==<br />
{| class="wikitable sortable"<br />
! colspan="9" style="background:#D6D6FF;" | Family Members<br />
|-<br />
! Part !! ROM !! RAM !! Notes<br />
|-<br />
| {{\|S2000}} || 1k x 8-bit || 64x4-bit RAM || 51 instructions<br />
|-<br />
| {{\|S2000A}} || 1k x 8-bit || 64x4-bit RAM || Identical to {{\|S2000}} [[vacuum fluorescent display|VFD]] driver support/high voltage support<br />
|-<br />
| {{\|S2150}} || 1.5k x 8-bit || 80x4-bit RAM || 51 instructions<br />
|-<br />
| {{\|S2150A}} || 1.5k x 8-bit || 80x4-bit RAM || Identical to {{\|S2150}} VFD driver support/high voltage support<br />
|-<br />
| {{\|S2200}} || 2k x 8-bit || 128x4-bit RAM || 59 instructions<br />
|-<br />
| {{\|S2200A}} || 2k x 8-bit || 128x4-bit RAM || Identical to {{\|S2200}} VFD driver support/high voltage support<br />
|-<br />
| {{\|S2400}} || 4k x 8-bit || 128x4-bit RAM || 59 instructions<br />
|-<br />
| {{\|S2400A}} || 4k x 8-bit || 128x4-bit RAM ||Identical to {{\|S2400}} VFD driver support/high voltage support<br />
|}<br />
<br />
== Design ==<br />
{{empty section}}<br />
<br />
== ISA ==<br />
{{empty section}}<br />
<br />
== Documents ==<br />
* [[:File:AMI S2000 family datasheet.pdf|S2000 Family Datasheet]]<br />
* [[:File:AMI S2000 Programming Manual Rev2 (june 1978).pdf|S2000 Family Programming Manual (1978)]]<br />
<br />
<br />
{{stub}}<br />
{{DEFAULTSORT:S2000}}<br />
[[Category:American Microsystems]]<br />
[[Category:4-bit microprocessors]]<br />
[[Category:1979 microprocessors]]<br />
[[Category:microprocessor families]]<br />
[[Category:AMI S2000]]</div>Jonhttps://en.wikichip.org/w/index.php?title=Property:ram&diff=20238Property:ram2016-05-19T04:56:41Z<p>Jon: </p>
<hr />
<div>This is a '''[[has type::quantity]]''' property representing the size of the RAM of the microcontroller/IC.<br />
<br />
Units:<br />
* [[Corresponds to::1 MB,megabyte,megabytes]]<br />
* [[Corresponds to::1000 kB,kilobyte,kilobytes]]<br />
* [[Corresponds to::1000000 B,byte,bytes]]<br />
* [[Corresponds to::0.001 GB,gigabyte,gigabytes]]<br />
<br />
== See also ==<br />
* [[Property:rom]]</div>Jonhttps://en.wikichip.org/w/index.php?title=Property:rom&diff=20237Property:rom2016-05-19T04:56:23Z<p>Jon: </p>
<hr />
<div>This is a '''[[has type::quantity]]''' property representing the size of the ROM of the microcontroller/IC.<br />
<br />
Units:<br />
* [[Corresponds to::1 MB,megabyte,megabytes]]<br />
* [[Corresponds to::1000 kB,kilobyte,kilobytes]]<br />
* [[Corresponds to::1000000 B,byte,bytes]]<br />
* [[Corresponds to::0.001 GB,gigabyte,gigabytes]]<br />
<br />
== See also ==<br />
* [[Property:ram]]</div>Jonhttps://en.wikichip.org/w/index.php?title=hitachi/hmcs-4&diff=20236hitachi/hmcs-42016-05-19T04:54:11Z<p>Jon: </p>
<hr />
<div>{{hitachi title|HMCS-4}}<br />
{{ic family<br />
| title = Hitachi HMCS-4<br />
| image = <!-- Image representation of the IC family, e.g. "MCS-4.jpg" --><br />
| caption = <!-- description of the image --><br />
| developer = Hitachi<br />
| manufacturer = Hitachi<br />
| type = microprocessors<br />
| production start = 1975<br />
| arch = 4-bit<br />
| isa = 4004<br />
| word = 4 bit<br />
| proc = <!-- process, e.g. "8 μm" --><br />
| tech = pMOS<br />
| clock = <!-- clock speed, e.g. "740 kHz" IF RANGE, USE PARAM BELOW! --><br />
| clock min = <!-- clock min speed, e.g. "200 MHz" --><br />
| clock max = <!-- clock max speed, e.g. "900 MHz" --><br />
| package = <!-- package, e.g. "DIP16" --><br />
| package 2 = <!-- package, e.g. "DIP16" --><br />
| package 3 = <!-- package, e.g. "DIP16" --><br />
| package 4 = <!-- package, e.g. "DIP16" --><br />
| package 5 = <!-- package, e.g. "DIP16" --><br />
}}<br />
The '''HMCS-4''' was a [[microprocessor family|family]] of {{arch|4}} multi-chip [[microprocessor]] manufactured by [[Hitachi]]. It is unknown if this was a licensed 2nd source or a faithful clone of the {{intel|MCS-4|Intel MCS-4}}. The complete system was made of 4 chips. The chipset included a [[ROM]] chip, a [[RAM]] chip, [[shift register]], and a [[4-bit architecture|4-bit]] [[microprocessor]]. The chipset was first produced first quarter of 1975. Hitachi appear to have used the same numbering system as Intel did for the family with the exception of the ROM chip which used an existing ROM chip.<br />
<br />
== Members ==<br />
{| class="wikitable"<br />
! colspan="2" | Family Members<br />
|-<br />
! Part !! Description<br />
|-<br />
| {{hitachi|HD35404}} || 4-bit CPU<br />
|-<br />
| {{hitachi|HN35600}} || ROM<br />
|-<br />
| {{hitachi|HD35402}} || RAM<br />
|-<br />
| {{hitachi|HD35403}} || Shift Register<br />
|}<br />
<br />
== Documents ==<br />
* [[:File:hitachi electronics brochure, 1976.pdf|Hitachi electronics catalog]], 1976<br />
<br />
== See also ==<br />
* {{intel|mcs-4/4004|Intel 4004}}<br />
* {{intel|MCS-4|Intel MCS-4}}<br />
* {{hitachi|HD35404}}<br />
<br />
[[Category:1975 microprocessors]]<br />
[[Category:4-bit microprocessor]]<br />
<br />
<br />
{{stub}}</div>Jonhttps://en.wikichip.org/w/index.php?title=hitachi/6309&diff=20235hitachi/63092016-05-19T04:54:08Z<p>Jon: </p>
<hr />
<div>{{hitachi title|6309}}<br />
{{ic family<br />
| title = Hitachi 6309<br />
| image = hd63c09ep.jpg<br />
| caption = HD63C09EP<br />
| developer = Motorola<br />
| developer 2 = Hitachi<br />
| manufacturer = Hitachi<br />
| type = Microprocessors<br />
| first launched = 1982<br />
| arch = 8-bit with support for 16/32 arithmetic<br />
| isa = 6309<br />
| word = 8 bit<br />
| proc = <br />
| tech = CMOS<br />
| clock min = 1 MHz<br />
| clock max = 5 MHz<br />
| package = DIP40<br />
| package 2 = CG40<br />
| package 3 = CP44<br />
| package 4 = FP52<br />
| package 5 = FP54<br />
}}<br />
The '''6309''' was a family of {{arch|8}} [[CMOS]] [[microprocessor]]s designed by [[Hitachi]] and released in late 1982. The 6309 was advertised and marketed as a licensed low-power [[CMOS]] version of the [[Motorola]] {{motorola|6809}}. This chip was also compatible with rest of the components in Hitachi's {{hitachi|HMCS-6800}} family.<br />
<br />
Renewed interest in the 6309 was brought about during the late 1980s (Japan) and 1992 (US/Europe) when a number of previously unknown and undocumented features surfaced. Some of those features were quite considerable for the time - including hardware support for {{arch|32}} arithmetic, block transfer, bit manipulation, and faster operations.<br />
<br />
== History ==<br />
Hitachi released the 6309 in late 1982 as a licensed second source for the {{motorola|6809}}. The 6309 was advertised and sold as 100% compatible [[CMOS]] version of {{motorola|6809}}. Being more power efficient and cooler, the 6309 became quite popular in the [[TRS-80 Color Computer|CoCo community]] as a replacement in their systems. Various observable differences in the two microprocessors were spotted very early on - particularly in the way illegal instructions were being handled. Those reports were simply seen as possible bugs in the Hitachi version.<br />
<br />
One of the earliest publications explaining some of the differences in the 6309 came from the Japanese Personal Computer Magazine "Oh!FM" published by SoftBank. In their April 1988 issue, it was revealed that the 6309 actually run in [[emulation mode]] by default and could in fact be switched to run in [[native mode]] which had a large set of extended features including additional [[register]]s, {{arch|32}} quad-word arithmetic, and a number of trap modes. It wasn't until 4 years later in 1992 when Hirotsugu Kakugawa, a [[computer engineering]] graduate student from Japan, posted a memo named "{{\|A MEMO ON THE SECRET FEATURES OF 6309}}" to comp.sys.m6809 exposing those features in English from the Oh!FM magazine.<br />
<br />
=== possible reasons ===<br />
There has been a number of speculations as to why Hitachi never documented those features. In fact, even to date, Hitachi has never officially confirmed their existence. Hitachi has been known to make minor tweaks and adjustments to products they license whenever they see fit. It has been speculated that their contract with Motorola simply restricted them from doing the same with the {{motorola|6809}}. It's entirely possible Hitachi chosen to not document those features to steer clear of legal issues.<br />
<br />
== Members ==<br />
{| class="wikitable sortable"<br />
|-<br />
! Part !! [[clock generator|Clock]] !! OP Temp !! Packages !! Notes<br />
|-<br />
| {{\|HD63B09}} || 2 MHz || -20 °C - 75 °C || {{\|HD63B09P}} - DIP40 || <br />
|-<br />
| {{\|HD63B09E}} || 2 MHz (Ext.) || -20 °C - 75 °C || {{\|HD63B09EP}} - DIP40 || External clock<br />
|-<br />
| {{\|HD63C09}} || 3 MHz || -20 °C - 75 °C || {{\|HD63C09P}} - DIP40 || <br />
|-<br />
| {{\|HD63C09E}} || 3 MHz (Ext.) || -20 °C - 75 °C || {{\|HD63C09EP}} - DIP40 || External clock<br />
|}<br />
<br />
== Design ==<br />
{{empty section}}<br />
<br />
=== ISA ===<br />
{{main|hitachi/6309/isa|l1=ISA}}<br />
{{empty section}}<br />
<br />
== See also ==<br />
* {{motorola|6809}}</div>Jonhttps://en.wikichip.org/w/index.php?title=nec/%CE%BCcom-43&diff=20234nec/μcom-432016-05-19T04:54:04Z<p>Jon: </p>
<hr />
<div>{{nec title|μCOM-43}}{{ic family<br />
| title = NEC μCOM-43 Family<br />
| image = <!-- Image representation of the IC family, e.g. "MCS-4.jpg" --><br />
| caption = <!-- description of the image --><br />
| developer = NEC<br />
| manufacturer = NEC<br />
| type = Microcontrollers<br />
| production start = May, 1977<br />
| production end = <!-- production end date, e.g. "January 1, 1985" or "1973" --><br />
| arch = 4-bit word, 10-bit instructions<br />
| isa = μCOM-4<br />
| word = 4 bit<br />
| proc = <!-- process, e.g. "8 μm" --><br />
| tech = pMOS<br />
| clock min = 150 kHz<br />
| clock max = 440 kHz<br />
| package = DIP42<br />
}}<br />
The '''μCOM-43''' (or uCOM-43) was [[microprocessor family|family]] of general-purpose {{arch|4}} [[microcontroller]]s, part of the {{nec|μCOM-4|μCOM-4 extended family}}. The μCOM-43 offered real hardware interrupt capabilities (as opposed to pseudo in the {{nec|μCOM-44}} and {{nec|μCOM-45}}).<br />
<br />
== Microcontrollers ==<br />
<!-- NOTE: <br />
This table is generated automatically from the data in the actual articles.<br />
If a microprocessor is missing from the list, an appropriate article for it needs to be<br />
created and tagged appropriately. (see/copy existing article)<br />
<br />
Missing a chip? please dump its name here: http://en.wikichip.org/wiki/WikiChip:wanted_chips<br />
--><br />
<table class="wikitable sortable"><br />
<tr><th colspan="9" style="background:#D6D6FF;">μCOM-43 Microcontrollers</th></tr><br />
<tr><th>Model</th><th>Part</th><th>Introduction</th><th>ROM</th><th>RAM</th><th>Pins</th></tr><br />
{{#ask: [[Category:microcontroller models by nec]] [[microcontroller family::μCOM-43]]<br />
|?full page name<br />
|?model number<br />
|?part number<br />
|?first launched<br />
|?rom breakdown<br />
|?ram breakdown<br />
|?pin count<br />
|format=template<br />
|template=proc table 2<br />
|userparam=7<br />
|mainlabel=-<br />
}}<br />
</table><br />
<br />
== Design ==<br />
{{empty section}}<br />
<br />
== μCOM-43 Instruction Set ==<br />
{{main|nec/μcom-4/isa|l1=μCOM-4 ISA}}<br />
The μCOM-43 ISA supported the entire μCOM-4 ISA which included 80 instructions.<br />
<br />
== See Also ==<br />
* {{nec|μCOM-4}}<br />
* {{nec|μCOM-8}}<br />
<br />
<br />
{{stub}}</div>Jonhttps://en.wikichip.org/w/index.php?title=nec/%CE%BCcom-42&diff=20233nec/μcom-422016-05-19T04:54:02Z<p>Jon: </p>
<hr />
<div>{{nec title|μCOM-42}}{{ic family<br />
| title = NEC μCOM-42 Family<br />
| image = <!-- Image representation of the IC family, e.g. "MCS-4.jpg" --><br />
| caption = <!-- description of the image --><br />
| developer = NEC<br />
| manufacturer = NEC<br />
| type = Microcontrollers<br />
| production start = February, 1977<br />
| production end = <!-- production end date, e.g. "January 1, 1985" or "1973" --><br />
| arch = 4-bit word, 10-bit instructions<br />
| isa = μCOM-42<br />
| word = 4 bit<br />
| proc = <!-- process, e.g. "8 μm" --><br />
| tech = pMOS<br />
| clock = <!-- clock speed, e.g. "740 kHz" IF RANGE, USE PARAM BELOW! --><br />
| clock min = 100 kHz<br />
| clock max = 200 kHz<br />
| package = DIP42<br />
}}<br />
The '''μCOM-42''' (or uCOM-42) was [[microprocessor family|family]] of {{arch|4}} [[microcontroller]]s, part of the {{nec|μCOM-4|μCOM-4 extended family}}, specifically marketed for electronic cash registers (ECRs), Point of Sale (POS), and electronic scale applications. These chips were specifically designed for controlling 8x4 keyboards, 8-digit displays, and various ECR-type printers. The μCOM-42 had a separate, modified instruction set, compared with the rest of the {{nec|μCOM-4}} families.<br />
<br />
== Microcontrollers ==<br />
<!-- NOTE: <br />
This table is generated automatically from the data in the actual articles.<br />
If a microprocessor is missing from the list, an appropriate article for it needs to be<br />
created and tagged appropriately. (see/copy existing article)<br />
<br />
Missing a chip? please dump its name here: http://en.wikichip.org/wiki/WikiChip:wanted_chips<br />
--><br />
<table class="wikitable sortable"><br />
<tr><th colspan="9" style="background:#D6D6FF;">μCOM-42 Microcontrollers</th></tr><br />
<tr><th>Model</th><th>Part</th><th>Introduction</th><th>ROM</th><th>RAM</th><th>Pins</th></tr><br />
{{#ask: [[Category:microcontroller models by nec]] [[microcontroller family::μCOM-42]]<br />
|?full page name<br />
|?model number<br />
|?part number<br />
|?first launched<br />
|?rom breakdown<br />
|?ram breakdown<br />
|?pin count<br />
|format=template<br />
|template=proc table 2<br />
|userparam=7<br />
|mainlabel=-<br />
}}<br />
</table><br />
<br />
== Design ==<br />
{{empty section}}<br />
<br />
== μCOM-42 Instruction Set ==<br />
{{main|/μcom-42 isa|l1=μCOM-42 ISA}}<br />
The μCOM-42 ISA had a set of 72 instructions. Every instruction is a single 10-bit word<br />
== See Also ==<br />
* {{nec|μCOM-4}}<br />
* {{nec|μCOM-8}}<br />
<br />
<br />
{{stub}}</div>Jonhttps://en.wikichip.org/w/index.php?title=intel/core_i7/i7-5850hq&diff=20232intel/core i7/i7-5850hq2016-05-19T04:53:12Z<p>Jon: </p>
<hr />
<div>{{intel title|Core i7-5850HQ}}<br />
{{mpu<br />
| name = Intel Core i7-5850HQ<br />
| image = <br />
| image size = <br />
| no image = yes<br />
| caption = <br />
| designer = Intel<br />
| manufacturer = Intel<br />
| model number = i7-5850HQ<br />
| part number = FH8065802491501<br />
| market = Mobile<br />
| first announced = June 2, 2015<br />
| first launched = June 2, 2015<br />
| last order = <br />
| last shipment = <br />
<br />
| family = Core i7<br />
| series = 5800<br />
| locked = Yes<br />
| frequency = 2700 MHz<br />
| turbo frequency = yes<br />
| turbo frequency1 = 3600 MHz<br />
| turbo frequency2 = <br />
| turbo frequency3 = <br />
| turbo frequency4 = <br />
| bus type = DMI 2.0<br />
| bus speed = <br />
| bus rate = 5 GT/s<br />
| clock multiplier = 27<br />
| s-spec = SR2BH<br />
<br />
| microarch = Broadwell <br />
| platform = <br />
| core name = <br />
| core stepping = G0<br />
| process = 14 nm<br />
| die size = <br />
| word size = 64 bits<br />
| core count = 4<br />
| thread count = 8<br />
| max cpus = 1<br />
| max memory = 32 GB<br />
<br />
| electrical = Yes<br />
| tdp = 47 W<br />
| temp max = 105 C<br />
<br />
| packaging = Yes<br />
| package = FCBGA1364<br />
| package type = FCBGA<br />
| package pitch = <br />
| package size = 37.5mm x 32mm x 1.8mm<br />
| socket = BGA1364<br />
| socket type = BGA<br />
}}<br />
The '''Intel Core i7-5850HQ''' is a [[quad core]] [[64-bit architecture|64-bit]] [[microprocessor]] introduced by [[Intel]] in 2015. The microprocessor is based on the [[Broadwell]] [[microarchitecture]], manufactured using 14nm process and incorporates the {{intel|Iris Pro Graphics 6200}}.<br />
<br />
== Cache ==<br />
{{cache info<br />
|l1i cache=128 KB<br />
|l1i break=4x32 KB<br />
|l1i desc=8-way set associative<br />
|l1i extra=(per core, write-back)<br />
|l1d cache=128 KB<br />
|l1d break=4x32 KB<br />
|l1d desc=8-way set associative<br />
|l1d extra=(per core, write-back)<br />
|l2 cache=1 MB<br />
|l2 break=4x256 KB<br />
|l2 desc=8-way set associative<br />
|l2 extra=(per core, write-back)<br />
|l3 cache=6 MB<br />
|l3 desc=shared<br />
}}<br />
<br />
== Graphics ==<br />
{{integrated graphic<br />
| gpu = Intel Iris Pro Graphics 6200<br />
| displays = 3<br />
| frequency = 300 MHz<br />
| max frequency = 1100 MHz<br />
| max memory = <br />
| output edp = Yes<br />
| output dp = Yes<br />
| output hdmi = Yes<br />
| output vga = Yes<br />
| output dvi = Yes<br />
| directx ver = 11.2<br />
| opengl ver = 4.3<br />
| opencl ver = 2.0<br />
| hdmi ver = 1.4a<br />
| dp ver = 1.2<br />
| edp ver = 1.3<br />
| max res hdmi = 2560x1600<br />
| max res hdmi freq = 24 Hz<br />
| max res dp = 4096x2304<br />
| max res dp freq = 60 Hz<br />
| max res edp = 4096x2304<br />
| max res edp freq = 60 Hz<br />
| max res vga = 1920x1200<br />
| max res vga freq = 60 Hz<br />
}}<br />
<br />
== Memory controller ==<br />
{{integrated memory controller<br />
| type = DDR3L-1600<br />
| type 1 = DDR3L-1866<br />
| type 2 = LPDDR3-1600<br />
| type 3 = LPDDR3-1866<br />
| controllers = 1<br />
| channels = 2<br />
| ecc support = No<br />
| max bandwidth = 25,600 MB/s<br />
| max memory = 32,768 MB<br />
}}<br />
<br />
== Expansions ==<br />
{{mpu expansions<br />
| pcie revision = 3.0<br />
| pcie lanes = 16<br />
| pcie config = 1x16<br />
| pcie config 1 = 2x8<br />
| pcie config 2 = 1x8+2x4<br />
}}<br />
<br />
== Features ==<br />
{{mpu features<br />
| em64t = Yes<br />
| nx = Yes<br />
| txt = <br />
| tsx = <br />
| ht = Yes<br />
| tbt2 = Yes<br />
| vt-x = Yes<br />
| vt-d = <br />
| mmx = Yes<br />
| sse = Yes<br />
| sse2 = Yes<br />
| sse3 = Yes<br />
| ssse3 = Yes<br />
| sse4 = Yes<br />
| sse4.1 = Yes<br />
| sse4.2 = Yes<br />
| aes = Yes<br />
| avx = Yes<br />
| avx2 = Yes<br />
| bmi = Yes<br />
| bmi1 = Yes<br />
| bmi2 = Yes<br />
| f16c = Yes<br />
| fma3 = Yes<br />
| sgx = <br />
| eist = Yes<br />
}}</div>Jonhttps://en.wikichip.org/w/index.php?title=intel/core_i7/i7-5950hq&diff=20231intel/core i7/i7-5950hq2016-05-19T04:53:08Z<p>Jon: </p>
<hr />
<div>{{intel title|Core i7-5950HQ}}<br />
{{mpu<br />
| name = Intel Core i7-5950HQ<br />
| image = <br />
| image size = <br />
| no image = yes<br />
| caption = <br />
| designer = Intel<br />
| manufacturer = Intel<br />
| model number = i7-5950HQ<br />
| part number = FH8065802491601<br />
| market = Mobile<br />
| first announced = June 2, 2015<br />
| first launched = June 2, 2015<br />
| last order = <br />
| last shipment = <br />
<br />
| family = Core i7<br />
| series = 5900<br />
| locked = Yes<br />
| frequency = 2900 MHz<br />
| turbo frequency = yes<br />
| turbo frequency1 = 3800 MHz<br />
| turbo frequency2 = <br />
| turbo frequency3 = <br />
| turbo frequency4 = <br />
| bus type = DMI 2.0<br />
| bus speed = <br />
| bus rate = 5 GT/s<br />
| clock multiplier = 29<br />
| s-spec = SR2BJ<br />
<br />
| microarch = Broadwell <br />
| platform = <br />
| core name = <br />
| core stepping = G0<br />
| process = 14 nm<br />
| die size = <br />
| word size = 64 bits<br />
| core count = 4<br />
| thread count = 8<br />
| max cpus = 1<br />
| max memory = 32 GB<br />
<br />
| electrical = Yes<br />
| tdp = 47 W<br />
| temp max = 105 C<br />
<br />
| packaging = Yes<br />
| package = FCBGA1364<br />
| package type = FCBGA<br />
| package pitch = <br />
| package size = 37.5mm x 32mm x 1.8mm<br />
| socket = BGA1364<br />
| socket type = BGA<br />
}}<br />
The '''Intel Core i7-5950HQ''' is a [[quad core]] [[64-bit architecture|64-bit]] [[microprocessor]] introduced by [[Intel]] in 2015. The microprocessor is based on the [[Broadwell]] [[microarchitecture]]. This MPU is manufactured using 14nm process and incorporates the {{intel|Iris Pro Graphics 6200}}.<br />
<br />
== Cache ==<br />
{{cache info<br />
|l1i cache=128 KB<br />
|l1i break=4x32 KB<br />
|l1i desc=8-way set associative<br />
|l1i extra=(per core, write-back)<br />
|l1d cache=128 KB<br />
|l1d break=4x32 KB<br />
|l1d desc=8-way set associative<br />
|l1d extra=(per core, write-back)<br />
|l2 cache=1 MB<br />
|l2 break=4x256 KB<br />
|l2 desc=8-way set associative<br />
|l2 extra=(per core, write-back)<br />
|l3 cache=6 MB<br />
|l3 desc=shared<br />
}}<br />
<br />
== Graphics ==<br />
{{integrated graphic<br />
| gpu = Intel Iris Pro Graphics 6200<br />
| displays = 3<br />
| frequency = 300 MHz<br />
| max frequency = 1150 MHz<br />
| max memory = <br />
| output edp = Yes<br />
| output dp = Yes<br />
| output hdmi = Yes<br />
| output vga = Yes<br />
| output dvi = Yes<br />
| directx ver = 11.2<br />
| opengl ver = 4.3<br />
| opencl ver = 2.0<br />
| hdmi ver = 1.4a<br />
| dp ver = 1.2<br />
| edp ver = 1.3<br />
| max res hdmi = 2560x1600<br />
| max res hdmi freq = 24 Hz<br />
| max res dp = 4096x2304<br />
| max res dp freq = 60 Hz<br />
| max res edp = 4096x2304<br />
| max res edp freq = 60 Hz<br />
| max res vga = 1920x1200<br />
| max res vga freq = 60 Hz<br />
}}<br />
<br />
== Memory controller ==<br />
{{integrated memory controller<br />
| type = DDR3L-1600<br />
| type 1 = DDR3L-1866<br />
| type 2 = LPDDR3-1600<br />
| type 3 = LPDDR3-1866<br />
| controllers = 1<br />
| channels = 2<br />
| ecc support = No<br />
| max bandwidth = 25,600 MB/s<br />
| max memory = 32,768 MB<br />
}}<br />
<br />
== Expansions ==<br />
{{mpu expansions<br />
| pcie revision = 3.0<br />
| pcie lanes = 16<br />
| pcie config = 1x16<br />
| pcie config 1 = 2x8<br />
| pcie config 2 = 1x8+2x4<br />
| pcie config 3 = 4x1<br />
}}<br />
<br />
== Features ==<br />
{{mpu features<br />
| em64t = Yes<br />
| nx = Yes<br />
| txt = <br />
| tsx = <br />
| ht = Yes<br />
| tbt2 = Yes<br />
| vt-x = Yes<br />
| vt-d = <br />
| mmx = Yes<br />
| sse = Yes<br />
| sse2 = Yes<br />
| sse3 = Yes<br />
| ssse3 = Yes<br />
| sse4 = Yes<br />
| sse4.1 = Yes<br />
| sse4.2 = Yes<br />
| aes = Yes<br />
| avx = Yes<br />
| avx2 = Yes<br />
| bmi = Yes<br />
| bmi1 = Yes<br />
| bmi2 = Yes<br />
| f16c = Yes<br />
| fma3 = Yes<br />
| sgx = <br />
| eist = Yes<br />
}}</div>Jonhttps://en.wikichip.org/w/index.php?title=intel/xeon_e3/e3-1284l_v3&diff=20230intel/xeon e3/e3-1284l v32016-05-19T04:53:05Z<p>Jon: </p>
<hr />
<div>{{intel title|Xeon E3-1284L v3}}<br />
{{mpu<br />
| name = Intel Xeon E3-1284L v3<br />
| image = <br />
| image size = <br />
| no image = yes<br />
| caption = <br />
| designer = Intel<br />
| manufacturer = Intel<br />
| model number = E3-1284L v3<br />
| part number = CL8064701637600<br />
| market = Server<br />
| first announced = Mar 1, 2014<br />
| first launched = October 1, 2014<br />
| last order = <br />
| last shipment = <br />
<br />
| family = Xeon E3<br />
| locked = Yes<br />
| frequency = 1800 MHz<br />
| turbo frequency = yes<br />
| turbo frequency1 = 3200 MHz<br />
| turbo frequency2 = 3100 MHz<br />
| turbo frequency3 = 3000 MHz<br />
| turbo frequency4 = 3000 MHz<br />
| bus type = DMI 2.0<br />
| bus speed = <br />
| bus rate = 5 GT/s<br />
| clock multiplier = 18<br />
| s-spec = SR1U0<br />
<br />
| microarch = Haswell <br />
| platform = <br />
| core name = <br />
| core stepping = C0<br />
| process = 22 nm<br />
| die size = <br />
| word size = 64 bits<br />
| core count = 4<br />
| thread count = 8<br />
| max cpus = 1<br />
| max memory = 32 GB<br />
<br />
| electrical = Yes<br />
| tdp = 47 W<br />
| temp max = 100 C<br />
<br />
| packaging = Yes<br />
| package = FCBGA1364<br />
| package type = FCBGA<br />
| package pitch = <br />
| package size = 37.5mm x 32mm x 1.65mm<br />
| socket = BGA1364<br />
| socket type = BGA<br />
}}<br />
The '''Intel Xeon E3-1284L v3''' is a [[quad core]] [[64-bit architecture|64-bit]] server [[microprocessor]] released by [[Intel]] in 2014. The microprocessor is based on the [[Haswell]] [[microarchitecture]]. This MPU includes the [[Intel Iris Pro 5200]] integrated graphic and features the 128 MB [[L4$]] {{intel|Crystal Well}} cache.<br />
<br />
== Cache ==<br />
This specific microprocessor includes the [[has feature::Crystal Well]] cache.<br />
{{cache info<br />
|l1i cache=128 KB<br />
|l1i break=4x32 KB<br />
|l1i desc=8-way set associative<br />
|l1i extra=(per core, write-back)<br />
|l1d cache=128 KB<br />
|l1d break=4x32 KB<br />
|l1d desc=8-way set associative<br />
|l1d extra=(per core, write-back)<br />
|l2 cache=1 MB<br />
|l2 break=4x256 KB<br />
|l2 desc=8-way set associative<br />
|l2 extra=(per core, write-back)<br />
|l3 cache=6 MB<br />
|l3 desc=shared<br />
|l4 cache=128 MB<br />
|l4 desc=16-way set associative<br />
|l4 extra=(see {{intel|Crystal Well}})<br />
}}<br />
<br />
== Graphics ==<br />
{{integrated graphic<br />
| gpu = Intel Iris Pro Graphics 5200<br />
| displays = 3<br />
| frequency = 200 MHz<br />
| max frequency = 750 MHz<br />
| max memory = 1000 MB<br />
| output edp = Yes<br />
| output dp = Yes<br />
| output hdmi = Yes<br />
| output vga = Yes<br />
| directx ver = <br />
| opengl ver = <br />
| max res hdmi = <br />
| max res hdmi freq = <br />
| max res dp = <br />
| max res dp freq = <br />
| max res vga = <br />
| max res vga freq = <br />
}}<br />
<br />
== Memory controller ==<br />
{{integrated memory controller<br />
| type = DDR3L-1333<br />
| type 1 = DDR3L-1600<br />
| controllers = 1<br />
| channels = 2<br />
| ecc support = Yes<br />
| max bandwidth = 25,600 MB/s<br />
| max memory = 32,768 MB<br />
}}<br />
<br />
== Features ==<br />
{{mpu features<br />
| em64t = Yes<br />
| nx = Yes<br />
| txt = Yes<br />
| tsx = Yes<br />
| ht = Yes<br />
| tbt2 = Yes<br />
| vt-x = Yes<br />
| vt-d = Yes<br />
| mmx = Yes<br />
| sse = Yes<br />
| sse2 = Yes<br />
| sse3 = Yes<br />
| ssse3 = Yes<br />
| sse4 = Yes<br />
| sse4.1 = Yes<br />
| sse4.2 = Yes<br />
| aes = Yes<br />
| avx = Yes<br />
| avx2 = Yes<br />
| bmi = Yes<br />
| bmi1 = Yes<br />
| bmi2 = Yes<br />
| f16c = Yes<br />
| fma3 = Yes<br />
| eist = Yes<br />
}}</div>Jonhttps://en.wikichip.org/w/index.php?title=WikiChip_talk:general_discussion&diff=13754WikiChip talk:general discussion2015-12-26T07:04:44Z<p>Jon: /* Semantic MediaWiki */ new section</p>
<hr />
<div>{{title|WikiChip's General Discussion}}<span style="float: right;">__TOC__</span><br />
== Welcome ==<br />
Welcome to Wikichip's General Discussion!<br />
<br />
Trying to find your way? check [[WikiChip:welcome]].<br />
<br />
[{{fullurl:{{TALKPAGENAMEE}}|action=edit&section=new}} Click here to start a new topic.]<br />
== Rules ==<br />
* Don't be a jerk<br />
* Don't bite the newcomers<br />
* Off-topic discussions are allowed but should be keep at minimum<br />
* If a topic has its own article, comments should be posted on its talk page<br />
= Discussion=<br />
<br />
== naming conventions ==<br />
<br />
Per our IRC chat discussions, can we come up with a formality as to how we want to sub-organize various thing such microprocessor and ICs in general, given that many (most?) are numbered and collisions are way too common to use wikipedia-style disambiguation.<br />
<br />
I think we've agrees the use of sub-pages is the right direction:<br />
<br />
* company<br />
** /family<br />
*** /chip<br />
<br />
So for example, the [[Intel 4004]] would ideally be located at: [[intel/mcs-4/4004]]. This will resolve the already-growing ambiguity issues we're getting. Even for the Intel 4004, the support chips 4001-4003 have conflict with the famous [[4000 series]] which include those chips, albeit missing 4004 (intentional?).<br />
<br />
To expand on that, the naming rule could be generalized into computers, systems, and programming language (although those we've already been following this naming convention for some time).<br />
<br />
* concept<br />
** dependent concept<br />
*** specialized instances of the dependent concept.<br />
<br />
Additionally, we want to use appropriate <nowiki>{{XXX title|title}}</nowiki> and <nowiki>{{XXX|topic}}</nowiki> to display appropriate titles and links, although in general things such as "[[Intel 4004]]", "[[4004]]", and "[[i4004]]" should all link correctly to the respective article. --[[User:ChipIt|ChipIt]] ([[User talk:ChipIt|talk]]) 23:29, 23 December 2015 (EST)<br />
<br />
<br />
:LGTM, I think it covers it all. --[[User:Jon|<font color="green" size="2px">Jonathan</font>]] ([[User talk:Jon|<font color="blue" size="2px">talk</font>]]) 00:27, 24 December 2015 (EST)<br />
:Yup, all sounds about right --[[User:David|David]] ([[User talk:David|talk]]) 15:58, 25 December 2015 (EST)<br />
<br />
== Semantic MediaWiki ==<br />
<br />
Any thought about installing Semantic MediaWiki? This will help us dramatically. Would also allow us to generate lists and compare different computers, microprocessors, and whatever else we might consider adding. Essentially all the values we're putting in those infoboxes could be compared and contrasted. Thoughts? --[[User:Jon|<font color="green" size="2px">Jonathan</font>]] ([[User talk:Jon|<font color="blue" size="2px">talk</font>]]) 02:04, 26 December 2015 (EST)</div>Jonhttps://en.wikichip.org/w/index.php?title=WikiChip_talk:general_discussion&diff=13646WikiChip talk:general discussion2015-12-24T05:27:01Z<p>Jon: /* naming conventions */</p>
<hr />
<div>{{title|WikiChip's General Discussion}}<span style="float: right;">__TOC__</span><br />
== Welcome ==<br />
Welcome to Wikichip's General Discussion!<br />
<br />
Trying to find your way? check [[WikiChip:welcome]].<br />
<br />
[{{fullurl:{{TALKPAGENAMEE}}|action=edit&section=new}} Click here to start a new topic.]<br />
== Rules ==<br />
* Don't be a jerk<br />
* Don't bite the newcomers<br />
* Off-topic discussions are allowed but should be keep at minimum<br />
* If a topic has its own article, comments should be posted on its talk page<br />
= Discussion=<br />
<br />
== naming conventions ==<br />
<br />
Per our IRC chat discussions, can we come up with a formality as to how we want to sub-organize various thing such microprocessor and ICs in general, given that many (most?) are numbered and collisions are way too common to use wikipedia-style disambiguation.<br />
<br />
I think we've agrees the use of sub-pages is the right direction:<br />
<br />
* company<br />
** /family<br />
*** /chip<br />
<br />
So for example, the [[Intel 4004]] would ideally be located at: [[intel/mcs-4/4004]]. This will resolve the already-growing ambiguity issues we're getting. Even for the Intel 4004, the support chips 4001-4003 have conflict with the famous [[4000 series]] which include those chips, albeit missing 4004 (intentional?).<br />
<br />
To expand on that, the naming rule could be generalized into computers, systems, and programming language (although those we've already been following this naming convention for some time).<br />
<br />
* concept<br />
** dependent concept<br />
*** specialized instances of the dependent concept.<br />
<br />
Additionally, we want to use appropriate <nowiki>{{XXX title|title}}</nowiki> and <nowiki>{{XXX|topic}}</nowiki> to display appropriate titles and links, although in general things such as "[[Intel 4004]]", "[[4004]]", and "[[i4004]]" should all link correctly to the respective article. --[[User:ChipIt|ChipIt]] ([[User talk:ChipIt|talk]]) 23:29, 23 December 2015 (EST)<br />
<br />
<br />
:LGTM, I think it covers it all. --[[User:Jon|<font color="green" size="2px">Jonathan</font>]] ([[User talk:Jon|<font color="blue" size="2px">talk</font>]]) 00:27, 24 December 2015 (EST)</div>Jonhttps://en.wikichip.org/w/index.php?title=intel/mcs-4&diff=13645intel/mcs-42015-12-24T05:25:23Z<p>Jon: minor additions</p>
<hr />
<div>{{intel title|MCS-4}}<br />
{{ic family<br />
| title = MCS-4<br />
| image = MCS-4.jpg<br />
| caption = The entire MCS-4 chipset: [[/4001|4001]], [[/4002|4002]], [[/4003|4003]], and [[/4004|4004]].<br />
| developer = [[Intel]]<br />
| manufacturer = [[Intel]]<br />
| production = [[1971]]-[[1980]]s<br />
| release = November 15, 1971<br />
| arch = [[4-bit architecture|4-bit]]<br />
| proc = [[10μm]]<br />
| clock = 740 [[kHz]]<br />
}}<br />
The '''MCS-4''' ('''Micro-Computer Set-4''') or '''4000 Series''' or '''Busicom Chip Set''' was a [[microprocessor family|family]] of [[4-bit architecture|4-bit]] microprocessor chipsets developed by [[Intel]]. The chipset, which was made of four individual chips included the [[/4004|4004]] CPU, the first commercial microprocessor. MCS-4 was completed by March 1971, entered production in June, and introduced into the market on November 15, 1971.<br />
<br />
== History ==<br />
[[File:1971 Intel Advertisement.jpg|250px|thumbnail|right|An ad for the 4004 in the Nov. 15, 1971 issue of [[Wikipedia:Electronic News|Electronic News]]]]<br />
Before Federico Faggin joined Intel in 1970, the development of the 4004 was stall and dreadful. Federico developed several design innovations at Intel that made it possible to fit the microprocessor in one chip, including new methodology for random logic chip design using silicon gate technology<ref>Faggin. Il padre del chip intelligente, Angelo Gallippi, 2002, 88-7118-149-2</ref>. Faggin developed the 4004 testing tool, chip and logic design concurrently with the layout of all the chips of the entire MCS-4 system.<br />
<br />
At the time, Intel was only known for their memory chips. On 15 November 1971, they publicly announced the first commercial microprocessor in the 15th issue of [[Wikipedia:Electronic News|Electronic News]]. The prophetic ad read: ''"Announcing a new era in integrated electronics"''. The chip was designed by Federico Faggin, Ted Hoff and Masatoshi Shima; it received U.S. Patent [http://www.google.com/patents/US3821715 #3,821,715].<br />
<br />
All the MCS-4 components were packaged in 16-pin ceramic [[Dual in-line package|DIP]]. The 16-pin package, which proved to be the most problematic restriction was imposed by management.<br />
<br />
== Components ==<br />
The MCS-4 can be minimally functioning with just the [[/4001|4001]] [[ROM]] and the [[/4004|4004]] [[CPU]], however its designed to be fully functioning with [[RAM]] and [[shift register]].additionally two more chips, the [[/4008|4008]] and [[/4009|4009]] to expand the system to work with any of Intel's existing memory chip selections.<br />
<br />
{| class="wikitable"<br />
! Part !! Description<br />
|-<br />
| [[/4001|4001]] || [[ROM]]<br />
|-<br />
| [[/4002|4002]] || [[RAM]]<br />
|-<br />
| [[/4003|4003]] || [[shift register]]<br />
|-<br />
| [[/4004|4004]] || [[CPU]]<br />
|-<br />
| [[/4008|4008]] || Address latch<br />
|-<br />
| [[/4009|4009]] || I/O Interface<br />
|}<br />
<br />
== References ==<br />
{{reflist}}<br />
<br />
<br />
{{stub}}</div>Jonhttps://en.wikichip.org/w/index.php?title=karnaugh_map&diff=13014karnaugh map2015-12-10T16:35:30Z<p>Jon: added visual</p>
<hr />
<div>{{title|Karnaugh Map (K-map)}}<br />
<div style="float: right; text-align: center; margin: 20px; width: 250px"><br />
[[File:3-input MAJ gate kmap.svg|200px]]<br /><br />
3-input [[MAJ]] gate<br /><br />
<math><br />
\begin{align}<br />
f(a,b,c) =& AB+AC+BC \\<br />
=& \sum m(3,5,6,7) \\<br />
f^\prime(a,b,c) =& \prod M(0,1,2,4)<br />
\end{align}<br />
</math><br />
</div><br />
'''Marnaugh Map''' ('''K-map''') is a graphical tool that provides a simple and straightforward method of [[logic minimization|minimizing]] [[Boolean algebra|Boolean expressions]]. The K-map method was introduced in 1953 by [[Maurice Karnaugh]] as an enhancement to [[Veitch diagram]].<br />
<br />
== Map Construction ==<br />
=== Map Formats ===<br />
A K-map is a square or rectangle divided into a number of smaller squares called '''cells'''. Each cell on the K-Map corresponds directly to a line in a [[truth table]]. There are always <math>2^n</math> cells in a K-Map where <math>n</math> is the number of variables in the {{ba|function}}. Below are the usual formats for 1-4 variable k-maps (larges k-maps are discussed later on).<br />
<br />
{| style="width: 500px; text-align: center"<br />
! 1-Variable K-map !! 2-Variables K-map<br />
|-<br />
| [[File:kmap (no labels) (1 var).svg|125px]] || [[File:kmap (no labels) (2 vars).svg|150px]]<br />
|-<br />
! 3-Variables K-map !! 4-Variables K-map<br />
|-<br />
| [[File:kmap (no labels) (3 vars).svg|200px]] || [[File:kmap (no labels) (4 vars).svg|200px]]<br />
|}<br />
<br />
=== Map Labeling ===<br />
The coordinates of the cells in a K-map are the input value combinations from the [[truth table]]. There are a number of common ways to label a K-map. The two most common methods are numerically and by variables and their complements. There are advantages to both. Regardless of which way you choose, the coordinates of two adjacent cells differ by only one variable - i.e. only one 0 can switch to a 1 and vice versa between two adjacent cells. For example, consider a function with 2 variables, the order by which you list them would be <math>00, 01, 11, 10</math>. Note how 11 and 10 were switched so that only one value is different.<br />
<br />
{| class="wikita2ble" style="text-align: center"<br />
! style="width: 300px; height: 50px;" | Numerically !! style="width: 300px;" | Variables<br />
|-<br />
! colspan="2" style="height: 35px;" | 1-Variable K-map<br />
|-<br />
|-<br />
| [[File:kmap (1 var).svg|100px]] || [[File:kmap (labels) (1 var).svg|100px]]<br />
|-<br />
! colspan="2" style="height: 35px;" | 2-Variables K-map<br />
|-<br />
| [[File:kmap (2 vars).svg|125px]] || [[File:kmap (labels) (2 vars).svg|125px]]<br />
|-<br />
! colspan="2" style="height: 35px;" | 3-Variables K-map<br />
|-<br />
| [[File:kmap (3 vars).svg|200px]] || [[File:kmap (labels) (3 vars).svg|200px]]<br />
|-<br />
! colspan="2" style="height: 35px;" | 4-Variables K-map<br />
|-<br />
| [[File:kmap (4 vars).svg|200px]] || [[File:kmap (labels) (4 vars).svg|200px]]<br />
|}<br />
<br />
=== Map Cell Numbering ===<br />
{| class="wikitable" style="float: right;"<br />
! colspan="3" | Inputs || colspan="2" | [[Minterm]]s || colspan="2" | [[Maxterm]]s<br />
|-<br />
! A !! B !! !! [[Minterm]]s !! Index !! [[Maxterm]]s !! Index<br />
|-<br />
| 0 || 0 || || <math>\bar A \bar B</math> || <math>m_0</math> || <math>A+B</math> || <math>M_0</math><br />
|-<br />
| 0 || 1 || || <math>\bar A B</math> || <math>m_1</math> || <math>A+\bar B</math> || <math>M_1</math><br />
|-<br />
| 1 || 0 || || <math>A \bar B</math> || <math>m_2</math> || <math>\bar A+B</math> || <math>M_2</math><br />
|-<br />
| 1 || 1 || || <math>AB</math> || <math>m_3</math> || <math>\bar A + \bar B</math> || <math>M_3</math><br />
|-<br />
! A !! B !! C !! [[Minterm]]s !! Index !! [[Maxterm]]s !! Index<br />
|-<br />
| 0 || 0 || 0 || <math>\bar A \bar B \bar C</math> || <math>m_0</math> || <math>A+B+C</math> || <math>M_0</math><br />
|-<br />
| 0 || 0 || 1 || <math>\bar A \bar B C</math> || <math>m_1</math> || <math>A+B+\bar C</math> || <math>M_1</math><br />
|-<br />
| 0 || 1 || 0 || <math>\bar AB \bar C</math> || <math>m_2</math> || <math>A+\bar B + C</math> || <math>M_2</math><br />
|-<br />
| 0 || 1 || 1 || <math>\bar A BC</math> || <math>m_3</math> || <math>A+\bar B+\bar C</math> || <math>M_3</math><br />
|-<br />
| 1 || 0 || 0 || <math>A \bar B \bar C</math> || <math>m_4</math> || <math>\bar A+B+C</math> || <math>M_4</math><br />
|-<br />
| 1 || 0 || 1 || <math>A \bar B C</math> || <math>m_5</math> || <math>\bar A+B+\bar C</math> || <math>M_5</math><br />
|-<br />
| 1 || 1 || 0 || <math>AB \bar C</math> || <math>m_6</math> || <math>A+B+\bar C</math> || <math>M_6</math><br />
|-<br />
| 1 || 1 || 1 || <math>ABC</math> || <math>m_7</math> || <math>\bar A+\bar B+\bar C</math> || <math>M_7</math><br />
|}<br />
Sometimes the individual cells are numbered in accordance with their [[minterm]] and [[maxterm]] indices. Strictly speaking this is unnecessary, but it may be useful in various situations when working with [[minterm]]s and [[maxterm]]s. Cell numbering are usually written in one of the cell corners.<br />
<br />
{| style="width: 500px; text-align: center"<br />
! 1-Variable K-map !! 2-Variables K-map<br />
|-<br />
| [[File:kmap (numbering) (1 var).svg|125px]] || [[File:kmap (numbering) (2 vars).svg|150px]]<br />
|-<br />
! 3-Variables K-map !! 4-Variables K-map<br />
|-<br />
| [[File:kmap (numbering) (3 vars).svg|200px]] || [[File:kmap (numbering) (4 vars).svg|200px]]<br />
|}<br />
<br />
== Populating a K-map==<br />
Populating a K-map can be done with a [[boolean algebra|Boolean expression]] or a [[truth table]].<br />
=== from Boolean expression ===<br />
Because each cell on the K-map represents a particular [[minterm]] (or [[maxterm]]). Converting the desired [[Boolean function]] into [[sum of minterms]] form can help considerably.<br />
<br />
Consider the following [[Boolean function]].<br />
::<math>f(A,B,C) = \bar A C + B(A+C)</math><br />
To make it easier to transfer the data to a K-map, the equation can be manipulated a bit so that it's in [[sum of minterms]] canonical form.<br />
::<math><br />
\begin{align}<br />
f(A,B,C) =& \bar A C + B(A+C) \\<br />
=& AB + \bar AC + BC && \mbox{By Distributive Axiom} \\<br />
=& AB(C+\bar C) + \bar AC(B+\bar B) + BC(A+\bar A) && \because (X+\bar X) = 1 \mbox{ By Inverse Axiom} \\<br />
=& ABC+AB\bar C+ \bar ACB + \bar AC\bar B + BCA + BC \bar A && \mbox{ By Distributive Axiom} \\<br />
=& ABC+AB\bar C+ \bar ABC + \bar A\bar BC + ABC + \bar ABC && \mbox{ By Commutative Axiom} \\<br />
=& ABC+AB\bar C+ \bar ABC + \bar A\bar BC && \mbox{ By Idempotent Law} \\<br />
=& m_7 + m_6 + m_3 + m_1<br />
\end{align}<br />
</math><br />
Each minterm in the equation is than transferred into the K-map where each variable in the minterm represents a 1 and each complemented variable represents a 0. <br />
[[File:kmap example color coded (expression).svg|400px]]<br />
=== from truth table ===<br />
Transferring the data from a [[truth table]] to a K-map is slightly more straightforward since each cell corresponds directly to each row in the table. A cell on the K-map is labeled 1 when the row they represent in the truth table results in a 1; otherwise the cell is labeled 0. Often times if the cell is 0, the 0 itself is simply omitted and is understood to mean that.<br />
[[File:kmap example color coded (table).svg|400px]]</div>Jonhttps://en.wikichip.org/w/index.php?title=File:kmap_example_color_coded_(expression).svg&diff=13013File:kmap example color coded (expression).svg2015-12-10T16:15:40Z<p>Jon: </p>
<hr />
<div>== Licensing ==<br />
{{PD-self}}</div>Jonhttps://en.wikichip.org/w/index.php?title=File:kmap_example_color_coded_(table).svg&diff=13012File:kmap example color coded (table).svg2015-12-10T16:14:39Z<p>Jon: </p>
<hr />
<div>== Licensing ==<br />
{{PD-self}}</div>Jonhttps://en.wikichip.org/w/index.php?title=karnaugh_map&diff=13010karnaugh map2015-12-09T20:16:16Z<p>Jon: /* Map Cell Numbering */ +images +table</p>
<hr />
<div>{{title|Karnaugh Map (K-map)}}<br />
<div style="float: right; text-align: center; margin: 20px; width: 250px"><br />
[[File:3-input MAJ gate kmap.svg|200px]]<br /><br />
3-input [[MAJ]] gate<br /><br />
<math><br />
\begin{align}<br />
f(a,b,c) =& AB+AC+BC \\<br />
=& \sum m(3,5,6,7) \\<br />
f^\prime(a,b,c) =& \prod M(0,1,2,4)<br />
\end{align}<br />
</math><br />
</div><br />
'''Marnaugh Map''' ('''K-map''') is a graphical tool that provides a simple and straightforward method of [[logic minimization|minimizing]] [[Boolean algebra|Boolean expressions]]. The K-map method was introduced in 1953 by [[Maurice Karnaugh]] as an enhancement to [[Veitch diagram]].<br />
<br />
== Format ==<br />
=== Map Formats ===<br />
A K-map is a square or rectangle divided into a number of smaller squares called '''cells'''. Each cell on the K-Map corresponds directly to a line in a [[truth table]]. There are always <math>2^n</math> cells in a K-Map where <math>n</math> is the number of variables in the {{ba|function}}. Below are the usual formats for 1-4 variable k-maps (larges k-maps are discussed later on).<br />
<br />
{| style="width: 500px; text-align: center"<br />
! 1-Variable K-map !! 2-Variables K-map<br />
|-<br />
| [[File:kmap (no labels) (1 var).svg|125px]] || [[File:kmap (no labels) (2 vars).svg|150px]]<br />
|-<br />
! 3-Variables K-map !! 4-Variables K-map<br />
|-<br />
| [[File:kmap (no labels) (3 vars).svg|200px]] || [[File:kmap (no labels) (4 vars).svg|200px]]<br />
|}<br />
<br />
=== Map Labeling ===<br />
The coordinates of the cells in a K-map are the input value combinations from the [[truth table]]. There are a number of common ways to label a K-map. The two most common methods are numerically and by variables and their complements. There are advantages to both. Regardless of which way you choose, the coordinates of two adjacent cells differ by only one variable - i.e. only one 0 can switch to a 1 and vice versa between two adjacent cells. For example, consider a function with 2 variables, the order by which you list them would be <math>00, 01, 11, 10</math>. Note how 11 and 10 were switched so that only one value is different.<br />
<br />
{| class="wikita2ble" style="text-align: center"<br />
! style="width: 300px; height: 50px;" | Numerically !! style="width: 300px;" | Variables<br />
|-<br />
! colspan="2" style="height: 35px;" | 1-Variable K-map<br />
|-<br />
|-<br />
| [[File:kmap (1 var).svg|100px]] || [[File:kmap (labels) (1 var).svg|100px]]<br />
|-<br />
! colspan="2" style="height: 35px;" | 2-Variables K-map<br />
|-<br />
| [[File:kmap (2 vars).svg|125px]] || [[File:kmap (labels) (2 vars).svg|125px]]<br />
|-<br />
! colspan="2" style="height: 35px;" | 3-Variables K-map<br />
|-<br />
| [[File:kmap (3 vars).svg|200px]] || [[File:kmap (labels) (3 vars).svg|200px]]<br />
|-<br />
! colspan="2" style="height: 35px;" | 4-Variables K-map<br />
|-<br />
| [[File:kmap (4 vars).svg|200px]] || [[File:kmap (labels) (4 vars).svg|200px]]<br />
|}<br />
<br />
=== Map Cell Numbering ===<br />
{| class="wikitable" style="float: right;"<br />
! colspan="3" | Inputs || colspan="2" | [[Minterm]]s || colspan="2" | [[Maxterm]]s<br />
|-<br />
! A !! B !! !! [[Minterm]]s !! Index !! [[Maxterm]]s !! Index<br />
|-<br />
| 0 || 0 || || <math>\bar A \bar B</math> || <math>m_0</math> || <math>A+B</math> || <math>M_0</math><br />
|-<br />
| 0 || 1 || || <math>\bar A B</math> || <math>m_1</math> || <math>A+\bar B</math> || <math>M_1</math><br />
|-<br />
| 1 || 0 || || <math>A \bar B</math> || <math>m_2</math> || <math>\bar A+B</math> || <math>M_2</math><br />
|-<br />
| 1 || 1 || || <math>AB</math> || <math>m_3</math> || <math>\bar A + \bar B</math> || <math>M_3</math><br />
|-<br />
! A !! B !! C !! [[Minterm]]s !! Index !! [[Maxterm]]s !! Index<br />
|-<br />
| 0 || 0 || 0 || <math>\bar A \bar B \bar C</math> || <math>m_0</math> || <math>A+B+C</math> || <math>M_0</math><br />
|-<br />
| 0 || 0 || 1 || <math>\bar A \bar B C</math> || <math>m_1</math> || <math>A+B+\bar C</math> || <math>M_1</math><br />
|-<br />
| 0 || 1 || 0 || <math>\bar AB \bar C</math> || <math>m_2</math> || <math>A+\bar B + C</math> || <math>M_2</math><br />
|-<br />
| 0 || 1 || 1 || <math>\bar A BC</math> || <math>m_3</math> || <math>A+\bar B+\bar C</math> || <math>M_3</math><br />
|-<br />
| 1 || 0 || 0 || <math>A \bar B \bar C</math> || <math>m_4</math> || <math>\bar A+B+C</math> || <math>M_4</math><br />
|-<br />
| 1 || 0 || 1 || <math>A \bar B C</math> || <math>m_5</math> || <math>\bar A+B+\bar C</math> || <math>M_5</math><br />
|-<br />
| 1 || 1 || 0 || <math>AB \bar C</math> || <math>m_6</math> || <math>A+B+\bar C</math> || <math>M_6</math><br />
|-<br />
| 1 || 1 || 1 || <math>ABC</math> || <math>m_7</math> || <math>\bar A+\bar B+\bar C</math> || <math>M_7</math><br />
|}<br />
Sometimes the individual cells are numbered in accordance with their [[minterm]] and [[maxterm]] indices. Strictly speaking this is unnecessary, but it may be useful in various situations when working with [[minterm]]s and [[maxterm]]s. Cell numbering are usually written in one of the cell corners.<br />
<br />
{| style="width: 500px; text-align: center"<br />
! 1-Variable K-map !! 2-Variables K-map<br />
|-<br />
| [[File:kmap (numbering) (1 var).svg|125px]] || [[File:kmap (numbering) (2 vars).svg|150px]]<br />
|-<br />
! 3-Variables K-map !! 4-Variables K-map<br />
|-<br />
| [[File:kmap (numbering) (3 vars).svg|200px]] || [[File:kmap (numbering) (4 vars).svg|200px]]<br />
|}</div>Jonhttps://en.wikichip.org/w/index.php?title=File:kmap_(numbering)_(4_vars).svg&diff=13009File:kmap (numbering) (4 vars).svg2015-12-09T19:52:48Z<p>Jon: </p>
<hr />
<div>== Licensing ==<br />
{{PD-self}}</div>Jonhttps://en.wikichip.org/w/index.php?title=File:kmap_(numbering)_(3_vars).svg&diff=13008File:kmap (numbering) (3 vars).svg2015-12-09T19:52:37Z<p>Jon: </p>
<hr />
<div>== Licensing ==<br />
{{PD-self}}</div>Jonhttps://en.wikichip.org/w/index.php?title=File:kmap_(numbering)_(2_vars).svg&diff=13007File:kmap (numbering) (2 vars).svg2015-12-09T19:52:24Z<p>Jon: </p>
<hr />
<div>== Licensing ==<br />
{{PD-self}}</div>Jonhttps://en.wikichip.org/w/index.php?title=File:kmap_(numbering)_(1_var).svg&diff=13006File:kmap (numbering) (1 var).svg2015-12-09T19:52:08Z<p>Jon: </p>
<hr />
<div>== Licensing ==<br />
{{PD-self}}</div>Jon